基于FPGA多通道采样系统设计完整设计报告（含电路图和程序）.doc

摘 要

本论文介绍了基于 FPGA 的多通道采样系统的设计。用 FPGA 设计一个多通道采样控

制器，利用 VHDL 语言设计有限状态机来实现对 AD7892 的控制。由于 FPGA 器件的特性

是 可 以 实 现 高 速 工 作 ， 为 此 模 拟 信 号 选 用 音 频 信 号 。 由 于 音 频 信 号 的 频 率 是

20Hz-20KHz,这样就对 AD 转换的速率有很高的要求.因为 FPGA 的功能很强大，所以我们

把系统的许多功能都集成到 FPGA 器件中，例如 AD 通道选择部分，串并输出控制模块，

这样使得整个系统的外围电路简单、系统的稳定性强。FPGA 的配置模式选用被动串行模

式，这样就增强了系统的可扩展性。输出模式可选择性使得系统的应用相当广泛，串行

输出可以用于通信信号的采集，方便调制后发射到远程接受端，远程接收端对采集的数

问题。

本文开始介绍了多通道系统的组成部分，然后分别介绍了各个组成部分的原理和设

计方法,其中重点介绍了FPGA软件设计部分。还对当前十分流行的基于FPGA的设计技术

作了简单的阐述，最后对系统的调试和应用作了简短的说明。

关键词：音频放大；滤波器；FPGA；VHDL；AD7892；有限状态机；

Abstract

The paper introduces the design of multiple channel sampling system based on FPGA, It

designs a multiple channel control sampling instrument with FPGA, I use VHDL to design

ASM and then achieve the control to AD7892. Because the FPGA device can work in

high-speed, we select audio signal for analog signals. The range of audio signal frequency is

brewage, and then the long-distance sink can demodulation the sampling data. The parallel

output mode can put the sampling data to the microprocessor or other processor by the

high-speed memorizer. And then control accordingly. The disadvantage of this system is that

the configure of the FPGA device is based on SRAM LUT. The message of programming is

kept in the SRAM, which will lose when the system is out of power supply. So we should

reconfigure the programming message into the FPGA device when the system has the power

supply again. It is not very convenience for working outside. But this can be resolve by using

appropriative configure device which can load the configure message into the FPGA device

automatically when the system have power supply. Because the price of the appropriative

device, I don't choose this configure mode in this design.

引言···························································1

1 FPGA 和 VHDL 概述·············································1

FPGA 发展历程·················································1

VHDL 语言介绍·················································3

2 多通道采样系统的组成········································3

3 总体方案设计与论证··········································4

3.1 方案设计·····················································4

3.1.1 方案一·····················································4

3.1.2 方案二·····················································4

3.1.3 方案三·····················································4

4.2.1 芯片介绍····················································8

4.2.2 芯片应用···················································11

4.3 FPGA 控制部分·················································11

4.3.1 通道选择模块···············································11

4.3.2 AD7892 控制部分·············································12

4.3.3 延时模块的设计·············································17

4.3.4 串并输出选择控制············································18

4.3.5 FIFO 模块··················································18

4.3.6 AD 采样系统顶层电路设计······································19

4.4 FPGA 的硬件设计··············································20

4.4.1 EP1K30TC144-3 芯片介绍·······································20

5.1 MAX+PlusⅡ··················································25

5.2 Electronics Workbench(EWB) ····································25

5.3Protel99SE···················································26

6 整机调试···················································26

6.1 硬件电路的调试步骤···········································26

6.1.1 音频放大部分调试············································26

6.1.2 滤波部分调试···············································27

6.1.3LM317 稳压块调试·············································27

6.1.4FPGA 硬件电路调试············································27

6.1.5AD 采样模块调试··············································28

6.2 联机调试····················································28

6.3 调试注意事项·················································28