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W83627DHG

WINBOND LPC I/O

Note: This document is both for UBC and UBE version

except specified descriptions

Date : December/12/2006 Version : 1.1

Publication Release Date: Dec, 12, 2006

-I- Version 1.1

W83627DHG

Data Sheet Revision History

PAGES

DATES VERSION

WEB

VERSION

MAIN CONTENTS

N.A. 12/15/2005

0.1

N.A.

1. First published version.

N.A. 02/22/2006

0.2 N.A.

1. Add descriptions of the registers, functions,,

AC/DC timing, and top marking

N.A. 03/15/2006

0.3 N.A.

1. Revise Table 8.1 and the timing chart of

section 10.3.1

2. Add registers for AMDSI at LDB,

CRF5h,CRF6h and F7h(Bank1)

3. Swap LDB, CRF2h bit 0 and bit 1.

4. Modify the default values for LDA, CRFEh

5. Modify the descriptions of LD9, CR30h bit 0

and CRF7h bit 4.

6. Remove LDA, CRE9h bit4 ~ 3

7. Swap LDC, CRE0h bit3~0 and CRE5h bit7~4

N.A. 05/05/2006

0.4 N.A.

1. Add FDC, UART, Parallel Port and KBC

interface descriptions

2. Remove all the descriptions about AMDSI

3. Modify the diagrams and descriptions for

Current Mode

4. Add two control bits for the selections of

SYSFANOUT and CPUFANOUT0 output

type at CR[24h]

5. Remove the description of the internal pulled-

up resistor of Parallel Port

6. Modify the definitions of edge/level and

enable/disable debounce circuit of GP30,

GP31 and GP35

7. Modify the descriptions of LD7, CRF7h and

LD9, CRE6h ~ CRE9h

Correct typos and grammatical mistakes

N.A 05/15/2006

0.41 N.A

1. Remove the remaining descriptions about

AMDSI in datasheet ver.0.4

N.A. 05/19/2006

0.42 N.A

1. Add a note for Index# of FDC Interface and

pin 83(GP42) of Serial Port & Infrared Port

Interface in Pin Description

2. Reserve the bit 7 of LD0, CRF0h

3. Modify the descriptions of TRAK0#, WP#,

RDATA# and DSKCHG# of FDC Interface

4. Modify the descriptions for strapping pins:

HEFRAS, PENROM, PENKBC and EN_GTL

5. Modify the DC spec.

N.A. 06/23/2006

0.5 N.A.

1. Remove the note and renew the descriptions

for Index# of FDC Interface.

2. Correct the descriptions of HM Device Bank

0, CR[12h] bit0.

3. Add two control bits for AUXFANOUT and

CPUFAOUT1 output type selection.

4. Add a new bit at LDC, CR[E8h] bit 1 for more

PECI clock selection.

5. Modify the default values of HM Device Bank

Publication Release Date: Dec, 12, 2006

-II- Version 1.1

W83627DHG

PAGES

DATES VERSION

WEB

VERSION

MAIN CONTENTS

0, CR[43h] bit 5,0 and CR[46h] bit 2~1.

N.A. 09/29/2006

0.6 N.A.

1. Add new chapters for Serial Peripheral

Interface, Configuration Register Access

Protocol, Power Management, Serialized

IRQ, Watchdog Timer VID Inputs and

Outputs, and PCI Reset Buffers.

2. Update the feature lists of the W83627DHG

in Chapter 2 Features.

3. Add descriptions of PECI and SST and a

table of SMBus in Chapter 5 Pin Description.

4. Add new sections of Caseopen and Beep

Alarm Function in Chapter 7 Hardware

Monitor.

5. Add Clock Input Timing, PECI & SST Timing,

and SPI Timing in Chapter 21 Specifications.

6. Remove sections 9.4 and 9.5 (EXTFDD and

EXT2FDD).

7. Modify the descriptions of Hardware Monitor

Device, Bank 0, Index 59h, bits(6..4).

8. Add a beep control bit for VIN4 at Hardware

Monitor Device, Bank 0, Index 57h, bit6.

9. Remove status bit of PME# status of MIDI

IRQ event at Logical Device A, CRF4, bit 1.

10. Remove control bit of enable/disable PME# of

MIDI at Logical Device A, CRF7, bit 1.

11. Modify the descriptions of Tape Drive

Controller.

12. Correct the description of Digital Input

Controller.

13. Remove the description of “MR pin” in Digital

Output Register in Chapter 10 Floppy Disk

Controller.

14. Adapt “Serial Flash Interface” to “Serial

Peripheral Interface”.

15. Modify “Absolute Maximum Ratings” in

Chapter 21 Specifications.

16. Remove “V

is 5V± 10% tolerance” from

the description of DC Characteristics in

Chapter 21 Specifications.

17. Update “

cold

state” to “S5 state.

18.

Remove the section of “AT Interface” in

Chapter 10 Floppy Disk Controller.

N.A. 10/05/2006

1.0 N.A.

1. Update AC Timing parameters and

waveforms.

N.A. 12/12/2006

1.1 N.A.

1. Update Table 9.1 and Table 9.2 in Chapter

9 Serial Peripheral Interface

2. Update CR2Ah in Chapter 20 Configuration

3. Modify CR24h bit 0 to reserved

4. Use “Tbase” instead of “TControl”

Publication Release Date: Dec, 12, 2006

-IV- Version 1.1

W83627DHG

TABLE OF CONTENTS –

GENERAL DESCRIPTION..................................................................................................... 1

FEATURES............................................................................................................................ 2

BLOCK DIAGRAM ................................................................................................................. 5

PIN LAYOUT ......................................................................................................................... 6

PIN DESCRIPTION................................................................................................................ 8

5.1

LPC Interface................................................................................................................... 9

5.2

FDC Interface................................................................................................................... 9

5.3

Multi-Mode Parallel Port ................................................................................................. 10

5.4

Serial Port & Infrared Port Interface................................................................................ 11

5.5

KBC Interface................................................................................................................. 13

5.6

Serial Peripheral Interface .............................................................................................. 15

5.7

Hardware Monitor Interface ............................................................................................ 15

5.8

PECI Interface................................................................................................................ 17

5.9

SST Interface................................................................................................................. 17

5.10

Advanced Configuration and Power Interface ................................................................. 17

5.11

General Purpose I/O Port............................................................................................... 19

5.11.1

SMBus Interface........................................................................................................................19

5.11.2

GPIO Power Source..................................................................................................................19

5.11.3

GPIO-2 Interface .......................................................................................................................19

5.11.4

GPIO-3 Interface .......................................................................................................................20

5.11.5

GPIO-4 Interface .......................................................................................................................20

5.11.6

GPIO-5 Interface .......................................................................................................................20

5.11.7

GPIO-6 Interface .......................................................................................................................21

5.11.8

GPIO-4 with WDTO# / SUSLED Multi-function..........................................................................21

5.12

Particular ACPI Function pins – For UBE version only .................................................... 21

5.13

POWER PINS ................................................................................................................ 22

CONFIGURATION REGISTER ACCESS PROTOCOL......................................................... 23

6.1 Configuration Sequence ....................................................................................................... 24

6.1.1

Enter the Extended Function Mode.............................................................................................24

6.1.2

Configure the Configuration Registers ........................................................................................25

6.1.3

Exit the Extended Function Mode ...............................................................................................25

6.1.4

Software Programming Example.................................................................................................25

HARDWARE MONITOR....................................................................................................... 27

7.1

General Description........................................................................................................ 27

7.2

Access Interfaces........................................................................................................... 27

7.2.1

LPC Interface ..............................................................................................................................27

7.2.2

C interface ................................................................................................................................29

7.3

Analog Inputs................................................................................................................. 30

7.3.1

Voltages Over 2.048 V or Less Than 0 V....................................................................................30

7.3.2

Voltage Detection........................................................................................................................31

7.3.3

Temperature Sensing..................................................................................................................31

7.3.3.1.

Monitor Temperature From Thermistor ............................................................................31

7.3.3.2.

Monitor Temperature from Thermal Diode (Voltage Mode)..............................................32

7.3.3.3.

Monitor Temperature From Thermal Diode (Current Mode).............................................32

7.4

SST Command Summary............................................................................................... 33

7.4.1

Command Summary ...................................................................................................................33

剩余252页未读，继续阅读

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IceBird_LJB

2014-07-15

很直接清晰

KK.m

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