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文库首页行业研究行业报告sobel算子图像边缘检测研究外文翻译.docx

sobel算子图像边缘检测研究外文翻译.docx

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sobel 算子图像边缘检测研究外文翻译

Real-time FPGA Based Implementation of Color

Image Edge Detection

Abstract— Color Image edge detection is very basic and important

step for many

applications such as image segmentation, image analysis, facial

analysis, objects identifications/tracking and many others. The main

challenge for real-time implementation of color image edge detection is

because of high volume of data to be processed (3 times as compared to

gray images). This paper describes the real-time implementation of Sobel

operator based color image edge detection using FPGA. Sobel operator is

chosen for edge detection due to its property to counteract the noise

sensitivity of the simple gradient operator. In order to achieve real-

time performance, a parallel architecture is designed, which uses three

processing elements to compute edge maps of R, G, and B color components.

The architecture is codedusing VHDL, simulated in ModelSim, synthesized

using Xilinx ISE 10.1 and implemented on Xilinx ML510 (Virtex-5 FX130T)

FPGA platform. The complete system is working at 27 MHz clock frequency.

The measured performance of our system for standard PAL (720x576) size

images is 50 fps (frames per second) and CIF (352x288) size images is

200 fps.

Index Terms— Real-time Color Image Edge Detection, Sobel Operator,

FPGA Implementation, VLSI Architecture, Color Edge Detection Processor

I. INTRODUCTION

High speed industrial applications require very accurate and real-

time edge detection. Edge detection in gray images does not give very

accurate results due to loss of color information during color to gray

scale image conversion. Therefore, to achieve desired accuracy,

detection of edges in color images is necessary. The main challenge for

real-time implementation of color image edge detection is in processing

of high volume of data (3 times as compared to gray images) within real-

time constraints. Therefore, it is hard to achieve real-time performance

of edge detection for PAL sizes color images with serial processors. Due

to inherent parallelism property, FPGAs can deliver real-time time

performance for such applications. Furthermore, FPGAs provide the

possibility to perform algorithm modifications in later stages of the

system development [1].

The main focus of most of the existing FPGA based implementations

for edge detection using Sobel operator has been on achieving real-time

performance for gray scale images by using various architectures and

different design methodologies. As edge detection is low-level image

processing operation, Single Instruction Multiple Data (SIMD) type

architectures [2] are very suitable for edge detection to achieve real-

time performance. These architectures use multiple data processing

elements and therefore, require more FPGA resources. The architecture

clock

frequency can be improved by using pipelining. A pipelined

architecture for real-time gray image edge detection is presented in [3].

Some computation optimized architectures are presented in [4, 5]. Few

more architectures for real-time gray image edge detection are available

in [6 - 11]. In [12, 13], the architectures are designed using MATLAB-

Simulink based design methodology.

In this paper, we show that real-time Sobel operator based color

image edge detection can be achieved by using a FPGA based parallel

architecture. For each color component in RGB space, one specific edge

computation processor is developed. As Sobel operator is sliding window

operator, smart buffer based Memory architecture is used to move the

incoming pixels in computing window. The specific datapaths are designed

and controller is developed to perform the complete task. The design and

simulation is done using VHDL. The design is targeted to Xilinx ML 510

(Virtex–5 FX130T) FPGA platform. The implementation is tested for real

world

scenario. It can robustly detect the edges in color images.

The rest of the paper is organized in the following way. In section

2 we describe the original Sobel operator based edge detection algorithm.

We show, in section 3, the customized architecture for algorithm

implementation and how each stage works. In section 4, practical tests

are evaluated and synthesis results are shown taking into account system

performance. Finally conclusions and

discussions are presented in section 5.

II. EDGE DETECTION SCHEME

In this section the used algorithm is briefly described, for a more

detailed description we refer to [14, 15]. The Sobel operator is widely

used for edge detection in images. It is based on computing an

approximation of thegradient of the image intensity function. The Sobel

filter uses two 3x3 spatial masks which are convolved with the original

image to calculate the approximations of the

gradient. The Sobel operator uses two filters Hx and Hy.

,101，，

,,H,,202 (1) X,,

,,,101，，

-1-2-1，，

,,H,001 (2) y,,

,,121，，

These filters compute the gradient components across the neighboring

lines or columns, respectively. The smoothing is performed over three

lines or columns before computing the respective gradients. In this

Sobel operator, the higher weights are assigned in smoothing part to

current center line and column as compared to simple gradient operators.

The local edge strength is defined as the gradient magnitude given by

equation 3.

22，，GMx,y,Hx，Hy (3)

This equation 3 is computationally costly because of square and

square root operations for every pixel. It is more suitable

computationally to approximate the square and square root operations by

absolute values.

，，GMx,y,Hx，Hy (4)

This expression is much easy to compute and still preserves the

relative changes in intensity (edges in images).

This above mentioned scheme is for gray scale images. For color

images (RGB color space) this scheme is applied separately for each

color component. Final color edge map of color image is computed by

using the edge maps of each color component [16].

(5) ColorEdge,(EdgeRorEdgeGorEdgeB)

III. PROPOSED ARCHITECTURE

To detect edges in real-time in PAL (720x576) size color images,

dedicated hardware architecture is implemented for Sobel operator based

edge detection scheme. Fig. 1 shows the conceptual block diagram of

complete system. The hardware setup includes a video camera, a video

daughter card, and FPGA board. The video output of camera connects to

Digilent VDEC1 Video Decoder Board which is interfaced with Xilinx ML510

(Virtex–5 FX130T) board using

Interface PCB. Display Monitor is connected to the board using DVI

connector. The video signals are decoded in Camera Interface Module. The

output RGB data of camera interface module is applied to edge detection

block. The edge detected output from the Edge Detection Block is

displayed on the display monitor using DVI controller. The camera

interface module also generates video timing signals which are necessary

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