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LF198-N

LF298

LF398-N

LF198A-N

LF398A-N

SNOSBI3B –JULY 2000–REVISED NOVEMBER 2015

LF298, LFx98x Monolithic Sample-and-Hold Circuits

1 Features 3 Description

The LF298 and LFx98x devices are monolithic

• Operates from ±5-V to ±18-V Supplies

sample-and-hold circuits that use BI-FET technology

• Less than 10-μs Acquisition Time

to obtain ultrahigh DC accuracy with fast acquisition

• Logic Input Compatible With TTL, PMOS, CMOS

of signal and low droop rate. Operating as a unity-

gain follower, DC gain accuracy is 0.002% typical and

• 0.5-mV Typical Hold Step at Ch = 0.01 µF

acquisition time is as low as 6 µs to 0.01%. A bipolar

• Low Input Offset

input stage is used to achieve low offset voltage and

• 0.002% Gain Accuracy

wide bandwidth. Input offset adjust is accomplished

with a single pin and does not degrade input offset

• Low Output Noise in Hold Mode

drift. The wide bandwidth allows the LF198-N to be

• Input Characteristics Do Not Change During Hold

included inside the feedback loop of 1-MHz

Mode

operational amplifiers without having stability

• High Supply Rejection Ratio in Sample or Hold

problems. Input impedance of 10

Ω allows high-

• Wide Bandwidth

source impedances to be used without degrading

accuracy.

• Space Qualified, JM38510

P-channel junction FETs are combined with bipolar

2 Applications

devices in the output amplifier to give droop rates as

low as 5 mV/min with a 1-µF hold capacitor. The

• Ramp Generators With Variable Reset Level

JFETs have much lower noise than MOS devices

• Integrators With Programmable Reset Level

used in previous designs and do not exhibit high

• Synchronous Correlators

temperature instabilities. The overall design ensures

no feedthrough from input to output in the hold mode,

• 2-Channel Switches

even for input signals equal to the supply voltages.

• DC and AC Zeroing

Logic inputs on the LF198-N are fully differential with

• Staircase Generators

low input current, allowing for direct connection to

TTL, PMOS, and CMOS. Differential threshold is

1.4 V. The LF198-N will operate from ±5-V to ±18-V

supplies.

An A version is available with tightened electrical

specifications.

Device Information

(1)

PART NUMBER PACKAGE BODY SIZE (NOM)

SOIC (14) 8.65 mm × 3.91 mm

LF298, LFx98x TO-99 (8) 9.08 mm × 9.08 mm

PDIP (8) 9.81 mm × 6.35 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Typical Connection

Acquisition Time

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

LF198-N

LF298

LF398-N

LF198A-N

LF398A-N

SNOSBI3B –JULY 2000–REVISED NOVEMBER 2015

www.ti.com

Table of Contents

8.2 Functional Block Diagram ....................................... 12

1 Features.................................................................. 1

8.3 Feature Description................................................. 12

2 Applications ........................................................... 1

8.4 Device Functional Modes........................................ 12

3 Description ............................................................. 1

9 Application and Implementation ........................ 13

4 Revision History..................................................... 2

9.1 Application Information............................................ 13

5 Pin Configuration and Functions......................... 3

9.2 Typical Applications ................................................ 15

6 Specifications......................................................... 4

10 Power Supply Recommendations ..................... 24

6.1 Absolute Maximum Ratings ...................................... 4

11 Layout................................................................... 25

6.2 Recommended Operating Conditions....................... 4

11.1 Layout Guidelines ................................................. 25

6.3 Thermal Information.................................................. 4

11.2 Layout Example .................................................... 25

6.4 Electrical Characteristics, LF198-N and LF298 ........ 5

12 Device and Documentation Support ................. 26

6.5 Electrical Characteristics, LF398-N........................... 6

12.1 Device Support...................................................... 26

6.6 Typical Characteristics.............................................. 7

12.2 Related Links ........................................................ 26

7 Parameter Measurement Information ................ 10

12.3 Community Resources.......................................... 26

7.1 TTL and CMOS 3 V ≤ V

LOGIC

(Hi State) ≤ 7 V ....... 10

12.4 Trademarks........................................................... 26

7.2 CMOS 7 V ≤ V

LOGIC

(Hi State) ≤ 15 V.................... 10

12.5 Electrostatic Discharge Caution............................ 26

7.3 Operational Amplifier Drive ..................................... 11

12.6 Glossary................................................................ 27

8 Detailed Description............................................ 12

13 Mechanical, Packaging, and Orderable

8.1 Overview ................................................................. 12

Information ........................................................... 27

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision A (July 2000) to Revision B Page

• Added ESD Ratings table, Thermal Information table, Feature Description section, Device Functional Modes,

Application and Implementation section, Power Supply Recommendations section, Layout section, Device and

Documentation Support section, and Mechanical, Packaging, and Orderable Information section....................................... 1

Product Folder Links: LF198-N LF298 LF398-N LF198A-N LF398A-N

LF198-N

LF298

LF398-N

LF198A-N

LF398A-N

SNOSBI3B –JULY 2000–REVISED NOVEMBER 2015

www.ti.com

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)(2)

MIN MAX UNIT

Supply voltage ±18 V

Power dissipation (Package limitation, see

(3)

) 500 mW

LF198-N, LF198A-N –55 125 °C

Operating ambient temperature LF298 –25 85 °C

LF398-N, LF398A-N 0 70 °C

Input voltage ±18 V

Logic-to-logic reference differential voltage (see

(4)

) 7 −30 V

Output short circuit duration Indefinite

Hold capacitor short circuit duration 10 sec

H package (soldering, 10 sec.) 260 ° C

N package (soldering, 10 sec.) 260 ° C

Lead temperature

M package: vapor phase (60 sec.) 215 ° C

Infrared (15 sec.) 220 ° C

Storage temperature, T

stg

–65 150 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.

(3) The maximum power dissipation must be derated at elevated temperatures and is dictated by T

JMAX

, R

θJA

, and the ambient

temperature, T

. The maximum allowable power dissipation at any temperature is P

= (T

JMAX

− T

) / R

θJA

, or the number given in the

Absolute Maximum Ratings, whichever is lower. The maximum junction temperature, T

JMAX

, for the LF198-N and LF198A-N is 150°C;

for the LF298, 115°C; and for the LF398-N and LF398A-N, 100°C.

(4) Although the differential voltage may not exceed the limits given, the common-mode voltage on the logic pins may be equal to the

supply voltages without causing damage to the circuit. For proper logic operation, however, one of the logic pins must always be at least

2 V below the positive supply and 3 V above the negative supply.

6.2 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN NOM MAX UNIT

Supply voltage ±15 V

LF198-N, LF198A-N –55 125

Ambient temperature LF298 –25 85 °C

LF398-N, LF398A-N 0 70

6.3 Thermal Information

LF398-N LF298, LF398-N LFx98x

THERMAL METRIC

(1)

P (PDIP) D (SOIC) LMC (TO-99) UNIT

8 PINS 14 PINS 8 PINS

θJA

Junction-to-ambient thermal resistance 48.9 80.6 85

(2)

°C/W

θJC(top)

Junction-to-case (top) thermal resistance 37.3 38.1 20 °C/W

θJB

Junction-to-board thermal resistance 26.2 35.4 — °C/W

Junction-to-top characterization parameter 14.3 5.8 — °C/W

Junction-to-board characterization parameter 26.0 35.1 — °C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

(2) Board mount in 400 LF/min air flow.

Product Folder Links: LF198-N LF298 LF398-N LF198A-N LF398A-N

LF198-N

LF298

LF398-N

LF198A-N

LF398A-N

www.ti.com

SNOSBI3B –JULY 2000–REVISED NOVEMBER 2015

6.4 Electrical Characteristics, LF198-N and LF298

The following specifications apply for –V

+ 3.5 V ≤ V

≤ +V

– 3.5 V, +V

= +15 V, –V

= –15 V, T

= T

= 25°C, C

= 0.01

µF, R

= 10 kΩ, LOGIC REFERENCE = 0 V, LOGIC HIGH = 2.5 V, LOGIC LOW = 0 V unless otherwise specified.

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

= 25°C 1 3 mV

Input offset voltage

(1)

Full temperature range 5 mV

= 25°C 5 25 nA

Input bias current

(1)

Full temperature range 75 nA

Input impedance T

= 25°C 10 GΩ

= 25°C, R

= 10k 0.002% 0.005%

Gain error

Full temperature range 0.02%

Feedthrough attenuation ratio at 1 kHz T

= 25°C, C

= 0.01 µF 86 96 dB

= 25°C, “HOLD” mode 0.5 2 Ω

Output impedance

Full temperature range 4 Ω

HOLD step

(2)

= 25°C, C

= 0.01 µF, V

OUT

= 0 0.5 2 mV

Supply current

(1)

≥ 25°C 4.5 5.5 mA

Logic and logic reference input current T

= 25°C 2 10 µA

Leakage current into hold capacitor

(1)

= 25°C

(3)

, hold mode 30 100 pA

ΔV

OUT

= 10 V, C

= 1000 pF 4 µs

Acquisition time to 0.1%

= 0.01 µF 20 µs

Hold capacitor charging current V

– V

OUT

= 2 V 5 mA

Supply voltage rejection ratio V

OUT

= 0 80 110 dB

Differential logic threshold T

= 25°C 0.8 1.4 2.4 V

= 25°C 1 1 mV

Input offset voltage

(1)

Full temperature range 2 mV

= 25°C 5 25 nA

Input bias current

(1)

Full temperature range 75 nA

Input impedance T

= 25°C 10 GΩ

= 25°C, R

= 10 k 0.002% 0.005%

Gain error

Full temperature range 0.01%

Feedthrough attenuation ratio at 1 kHz T

= 25°C, C

= 0.01 µF 86 96 dB

= 25°C, “HOLD” mode 0.5 1 Ω

Output impedance

Full temperature range 4 Ω

HOLD step

(2)

= 25°C, C

= 0.01 µF, V

OUT

= 0 0.5 1 mV

Supply current

(1)

≥ 25°C 4.5 5.5 mA

Logic and logic reference input current T

= 25°C 2 10 µA

Leakage current into hold capacitor

(1)

= 25°C

(3)

, hold mode 30 100 pA

ΔV

OUT

= 10 V, C

= 1000 pF 4 6 µs

Acquisition time to 0.1%

= 0.01 µF 20 25 µs

Hold capacitor charging current V

– V

OUT

= 2 V 5 mA

Supply voltage rejection ratio V

OUT

= 0 90 110 dB

Differential logic threshold T

= 25°C 0.8 1.4 2.4 V

(1) These parameters ensured over a supply voltage range of ±5 to ±18 V, and an input range of –V

+ 3.5 V ≤ V

≤ +V

– 3.5 V.

(2) Hold step is sensitive to stray capacitive coupling between input logic signals and the hold capacitor. 1 pF, for instance, will create an

additional 0.5-mV step with a 5-V logic swing and a 0.01-µF hold capacitor. Magnitude of the hold step is inversely proportional to hold

capacitor value.

(3) Leakage current is measured at a junction temperature of 25°C. The effects of junction temperature rise due to power dissipation or

elevated ambient can be calculated by doubling the 25°C value for each 11°C increase in chip temperature. Leakage is guaranteed over

full input signal range.

Product Folder Links: LF198-N LF298 LF398-N LF198A-N LF398A-N

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