lm80-p0436-13_c_qc_snapdragon_410_processor

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Qualcomm Technologies, Inc.

MSM and Qualcomm Snapdragon are products of Qualcomm Technologies, Inc. Other Qualcomm products referenced herein are products of

Qualcomm Technologies, Inc. or its other subsidiaries.

Qualcomm, MSM, and Snapdragon are trademarks of Qualcomm Incorporated, registered in the United States and other countries.All

Qualcomm Incorporated trademarks are used with permission. Other product and brand names may be trademarks or registered trademarks

of their respective owners.

This technical data may be subject to U.S. and international export, re-export, or transfer (“export”) laws. Diversion contrary to U.S. and

international law is strictly prohibited.

Use of this document is subject to the license set forth In Exhibit 1.

Questions or comments: https://www.96boards.org/forums/forum/products/dragonboard/

Qualcomm Technologies, Inc.

5775 Morehouse Drive

San Diego, CA 92121

U.S.A.

LM80-P0436-13 Rev. C

Qualcomm® Snapdragon™ 410 Processor

APQ8016

Hardware Register Description

LM80-P0436-13 Rev. C

January 2016

LM80-P0436-13 Rev. C MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION 3

Contents

1 Introduction................................................................................................................ 11

1.1 Overview .......................................................................................................................... 11

1.2 System memory map .......................................................................................................12

1.3 PCNOC memory map ......................................................................................................13

2 Bus Integrated Memory Controller ..........................................................................14

2.1 BIMC_MISC .....................................................................................................................14

2.1.1 BIMC_BIMC_MISC.................................................................................................14

2.2 GLOBAL1 .........................................................................................................................21

2.2.1 BIMC_BRIC_GLOBAL1..........................................................................................22

2.3 GLOBAL2 .........................................................................................................................30

2.3.1 BIMC_BRIC_GLOBAL2..........................................................................................30

2.4 BIMC_M_APP_MPORT ...................................................................................................41

2.4.1 BIMC_M_APP_MPORT_BRIC_MASTERPORT ....................................................41

2.5 BIMC_M_APP_PROF ......................................................................................................62

2.5.1 BIMC_M_APP_PROF_BRIC_PROFILING.............................................................62

2.6 BIMC_M_DSP_MPORT ...................................................................................................78

2.6.1 BIMC_M_DSP_MPORT_BRIC_MASTERPORT ....................................................78

2.7 BIMC_M_DSP_PROF ......................................................................................................99

2.7.1 BIMC_M_DSP_PROF_BRIC_PROFILING.............................................................99

2.8 BIMC_M_DSP_PROF .................................................................................................... 115

2.8.1 BIMC_M_DSP_PROF_BRIC_PROFILING........................................................... 115

2.9 BIMC_M_GPU_PROF....................................................................................................131

2.9.1 BIMC_M_GPU_PROF_BRIC_PROFILING ..........................................................131

2.10 BIMC_M_GPU_MPORT...............................................................................................147

2.10.1 BIMC_M_GPU_MPORT_BRIC_MASTERPORT................................................147

2.11 BIMC_M_SYS0_PROF ................................................................................................168

2.11.1 BIMC_M_SYS0_PROF_BRIC_PROFILING .......................................................168

2.12 BIMC_M_SYS0_MPORT .............................................................................................169

2.12.1 BIMC_M_SYS0_MPORT_BRIC_MASTERPORT ..............................................169

2.13 BIMC_M_TCU0_MPORT .............................................................................................191

2.13.1 BIMC_M_TCU0_MPORT_BRIC_MASTERPORT ..............................................191

LM80-P0436-13 Rev. C MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION 4

Qualcomm® Snapdragon™ 410 Processor APQ8016 Hardware Register Description Contents

2.14 BIMC_M_SYS1_PROF ................................................................................................212

2.14.1 BIMC_M_SYS1_PROF_BRIC_PROFILING.......................................................212

2.15 BIMC_M_TCU0_MPORT .............................................................................................228

2.15.1 BIMC_M_TCU0_MPORT_BRIC_MASTERPORT ..............................................228

2.16 BIMC_M_TCU0_PROF ................................................................................................249

2.16.1 BIMC_M_TCU0_PROF_BRIC_PROFILING.......................................................249

2.17 BIMC_M_TCU1_MPORT .............................................................................................265

2.17.1 BIMC_M_TCU1_MPORT_BRIC_MASTERPORT ..............................................265

2.18 BIMC_M_TCU1_PROF ................................................................................................286

2.18.1 BIMC_M_TCU1_PROF_BRIC_PROFILING.......................................................286

2.19 BIMC_S_APP_SWAY...................................................................................................302

2.19.1 BIMC_S_APP_SWAY_BRIC_SLAVEWAY .........................................................302

2.20 BIMC_S_SYS_SWAY...................................................................................................316

2.20.1 BIMC_S_SYS_SWAY_BRIC_SLAVEWAY .........................................................316

2.21 BIMC_S_DEFAULT_SWAY..........................................................................................331

2.21.1 BIMC_S_DEFAULT_SWAY_BRIC_SLAVEWAY_DEFAULT...............................331

2.22 BIMC_S_APP_ARB .....................................................................................................335

2.22.1 BIMC_S_APP_ARB_BRIC_ARBITER................................................................335

2.23 BIMC_S_DDR0_ARB...................................................................................................337

2.23.1 BIMC_S_DDR0_ARB_BRIC_ARBITER .............................................................337

2.24 BIMC_S_SYS_ARB .....................................................................................................340

2.24.1 BIMC_S_SYS_ARB_BRIC_ARBITER................................................................340

2.25 BIMC_S_DEFAULT_ARB.............................................................................................342

2.25.1 BIMC_S_DEFAULT_ARB_BRIC_ARBITER .......................................................343

2.26 BIMC_S_DDR0_SCMO ...............................................................................................345

2.26.1 BIMC_S_DDR0_SCMO_SCMO_CFGREG........................................................345

2.27 BIMC_S_DDR0_DPE_ABHN_DPE .............................................................................368

2.28 BIMC_S_DDR0_SHKE_ABHN_SHKE.........................................................................461

3 Peripheral Configuration NOC ...............................................................................482

3.1 PCNOC_0_BUS_TIMEOUT...........................................................................................545

3.2 PCNOC_1_BUS_TIMEOUT...........................................................................................549

3.3 PCNOC_2_BUS_TIMEOUT...........................................................................................553

3.4 PCNOC_3_BUS_TIMEOUT...........................................................................................556

3.5 PCNOC_4_BUS_TIMEOUT...........................................................................................560

3.6 PCNOC_5_BUS_TIMEOUT...........................................................................................565

3.7 PCNOC_6_BUS_TIMEOUT...........................................................................................568

3.8 PCNOC_7_BUS_TIMEOUT...........................................................................................572

3.9 PCNOC_8_BUS_TIMEOUT...........................................................................................576

3.10 PCNOC_9_BUS_TIMEOUT.........................................................................................580

4 Clock Controller.......................................................................................................584

4.1 GCC_GLOBAL_CLK_CTL_REG ...................................................................................584

LM80-P0436-13 Rev. C MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION 5

Qualcomm® Snapdragon™ 410 Processor APQ8016 Hardware Register Description Contents

5 Core Top CSR ..........................................................................................................949

5.1 TCSR_TCSR_MUTEX ...................................................................................................949

5.1.1 TCSR_TCSR_MUTEX..........................................................................................949

5.2 TCSR_TCSR_REGS......................................................................................................949

5.2.1 TCSR_TCSR_REGS ............................................................................................949

6 DMA Engine for Hardware Retention BIMC Wrapper........................................... 993

6.1 DEHR_BIMC ..................................................................................................................993

6.1.1 DEHR_BIMC_DEHR.............................................................................................993

7 EBI1 Physical Layer Configuration........................................................................996

7.1 DIM_C00_DDRPHY_CA ................................................................................................996

7.2 DIM_D00_DDRPHY_DQ..............................................................................................1018

7.3 DIM_D01_DDRPHY_DQ..............................................................................................1041

7.4 DIM_D02_DDRPHY_DQ..............................................................................................1064

7.5 DIM_D03_DDRPHY_DQ..............................................................................................1087

7.6 EBI1_AHB2PHY........................................................................................................... 1110

7.6.1 EBI1_AHB2PHY ................................................................................................. 1110

7.7 EBI1_AHB2PHY_BROADCAST ...................................................................................1111

7.7.1 EBI1_AHB2PHY_BROADCAST..........................................................................1111

8 A53SS ..................................................................................................................... 1113

8.1 APCS_QTMR_AC ........................................................................................................ 1113

8.1.1 APCS_QTMR_AC............................................................................................... 1113

8.2 APCS_F0_QTMR_V1 .................................................................................................. 1116

8.2.1 APCS_F0_QTMR_V1......................................................................................... 1116

8.3 APCS_F0_QTMR_V2 .................................................................................................. 1123

8.3.1 APCS_F0_QTMR_V2......................................................................................... 1123

8.4 APCS_F1_QTMR_V1 .................................................................................................. 1128

8.4.1 APCS_F1_QTMR_V1......................................................................................... 1128

8.5 APCS_F2_QTMR_V1 .................................................................................................. 1135

8.5.1 APCS_F2_QTMR_V1......................................................................................... 1135

8.6 APCS_F3_QTMR_V1 .................................................................................................. 1142

8.6.1 APCS_F3_QTMR_V1......................................................................................... 1142

8.7 APCS_F4_QTMR_V1 .................................................................................................. 1149

8.7.1 APCS_F4_QTMR_V1......................................................................................... 1149

8.8 APCS_F5_QTMR_V1 .................................................................................................. 1155

8.8.1 APCS_F5_QTMR_V1......................................................................................... 1155

8.9 APCS_F6_QTMR_V1 .................................................................................................. 1162

8.9.1 APCS_F6_QTMR_V1......................................................................................... 1162

8.10 APCS_A53SS_HYP ................................................................................................... 1169

8.11 APCS_KPSS_WDT .................................................................................................... 1172

8.12 APCS_SH_KPSS_PLL............................................................................................... 1175

8.13 APCS_L2_SAW2........................................................................................................ 1178

8.14 APCS_BANKED_SAW2............................................................................................. 1185

8.15 APCS_ALIAS0_SAW2 ............................................................................................... 1191

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