PUBLISHED SFF-8679 Revision 1.8
QSFP+ 4X Hardware and Electrical Specification Page 2
Copyright © 2018 SNIA.
Change History
Rev 1.5:
- Moved referenced SFF specs to 2.1 Industry Documents and expanded the list.
Rev 1.6:
- Updated Figure 1 to show retimers.
- Removed two-wire interface timing diagram which is now in SFF-8636.
- Complete rewrite of power supply section to add support for Power Classes 5
to 7.
- Added section 8 "Timing Requirements".
Rev 1.7
- Editorial only, no technical changes.
Rev 1.8
- Converted to SNIA SFF template.
- Editorial updates throughout.
- Title changed to “Hardware and Electrical” to better reflect contents
- Updated abstract
- Updated editor contact information.
- Section 1 Scope – rewrote to better reflect content.
- Section 2 References – replaced several entries with updated document
numbers and names.
- Section 2.3 Acronyms – deleted several unused entries and added several
new ones based on content.
- Section 3 General Description – Rewrote most of this section to reflect
updated content. Added several relevant applications to Table 3-1.
- Section 4 Compliance Testing – updated Figure 4-1 and corrected test point
descriptions in Table 4-1.
- Section 5 Electrical Specification –
o Updated Figure 5-1 and Table 5-1 to show the new dual-purpose
signals LPMode/TxDis and IntL/RxLOSL on pads 31 and 28
respectively. Rewrote Note 2 of Table 5-1 for clarity.
o Replaced “pin” by “pad” throughout
o Replaced Figures 5-2 and 5-3 to better reflect current
applications.
o Extensive updates of Section 5.3 describing Low Speed Signals.
o Updates to Table 5-2 to explain SCL and SDA electrical
requirements and maximum pull-up resistor values for 400 kHz
operation.
o Significant revisions to text in 5.4 Low Speed Signal Electrical
Specifications and 5.5 High Speed Signal Electrical
Specifications.
o Re-ordered and rewrote section 5.6 Power Supply Requirements
including adding a new Power Class 8 with a maximum power limited
only by the connector current rating.
- Section 6 Mechanical and Board Definition – cleaned up this section to
reference the relevant documents instead of including non
hardware/electrical features.
- Section 7 Environmental and Temperature – added a “custom” temperature
class for modules that do not comply with any of the legacy case
temperature ranges, e.g., hyperscale data center applications.
- Section 8 Timing Requirements
o Major updates to Table 8-1 including re-writes of many entries in
the “Conditions” column.
o Changed limit for “Reset Init Assert Time” from a maximum of 2 us