Documentation and download available at https://www.FreeRTOS.org/
Changes between FreeRTOS V10.5.0 and FreeRTOS V10.5.1 released November 16 2022
+ Updating the version in the manifest.yml file to be accurate.
Changes between FreeRTOS V10.4.6 and FreeRTOS V10.5.0 released September 16 2022
+ ARMv7-M and ARMv8-M MPU ports: It was possible for a third party that
already independently gained the ability to execute injected code to
read from or write to arbitrary addresses by passing a negative argument
as the xIndex parameter to pvTaskGetThreadLocalStoragePointer() or
vTaskSetThreadLocalStoragePointer respectively. A check has been added to
ensure that passing a negative argument as the xIndex parameter does not
cause arbitrary read or write.
We thank Certibit Consulting, LLC for reporting this issue.
+ ARMv7-M and ARMv8-M MPU ports: It was possible for an unprivileged task
to invoke any function with privilege by passing it as a parameter to
MPU_xTaskCreate, MPU_xTaskCreateStatic, MPU_xTimerCreate,
MPU_xTimerCreateStatic, or MPU_xTimerPendFunctionCall. MPU_xTaskCreate
and MPU_xTaskCreateStatic have been updated to only allow creation of
unprivileged tasks. MPU_xTimerCreate, MPU_xTimerCreateStatic and
MPU_xTimerPendFunctionCall APIs have been removed.
We thank Huazhong University of Science and Technology for reporting
this issue.
+ ARMv7-M and ARMv8-M MPU ports: It was possible for a third party that
already independently gained the ability to execute injected code to
achieve further privilege escalation by branching directly inside a
FreeRTOS MPU API wrapper function with a manually crafted stack frame.
The local stack variable `xRunningPrivileged` has been removed so that
a manually crafted stack frame cannot be used for privilege escalation
by branching directly inside a FreeRTOS MPU API wrapper.
We thank Certibit Consulting, LLC, Huazhong University of Science and
Technology and the SecLab team at Northeastern University for reporting
this issue.
+ ARMv7-M MPU ports: It was possible to configure overlapping memory
protection unit (MPU) regions such that an unprivileged task could access
privileged data. The kernel now uses highest numbered MPU regions for
kernel protections to prevent such MPU configurations.
We thank the SecLab team at Northeastern University for reporting this
issue.
+ Add support for ARM Cortex-M55.
+ Add support for ARM Cortex-M85. Contributed by @gbrtth.
+ Add vectored mode interrupt support to the RISC-V port.
+ Add support for RV32E extension (Embedded Profile) in RISC-V GCC port.
Contributed by @Limoto.
+ Heap improvements:
- Add a check to heap_2 to track if a memory block is allocated to
the application or not. The MSB of the size field is used for this
purpose. The same check already exists in heap_4 and heap_5. This
check prevents double free errors.
- Add a new flag configHEAP_CLEAR_MEMORY_ON_FREE to heap_2, heap_4
and heap_5. If the flag is set in FreeRTOSConfig.h then memory freed using
vPortFree() is automatically cleared to zero.
- Add a new API pvPortCalloc to heap_2, heap_4 and heap_5 which has the same
signature as the standard library calloc function.
- Update the pointer types to portPOINTER_SIZE_TYPE. Contributed by
@Octaviarius.
+ Add the ability to override send and receive completed callbacks for each
instance of a stream buffer or message buffer. Earlier there could be
one send and one receive callback for all instances of stream and message
buffers. Having separate callbacks per instance allows different message
and stream buffers to be used differently - for example, some for inter core
communication and others for same core communication.
The feature can be controlled by setting the configuration option
configUSE_SB_COMPLETED_CALLBACK in FreeRTOSConfig.h. When the option is set to 1,
APIs xStreamBufferCreateWithCallback() or xStreamBufferCreateStaticWithCallback()
(and likewise APIs for message buffer) can be used to create a stream buffer
or message buffer instance with application provided callback overrides. When
the option is set to 0, then the default callbacks as defined by
sbSEND_COMPLETED() and sbRECEIVE_COMPLETED() macros are invoked. To maintain
backwards compatibility, configUSE_SB_COMPLETED_CALLBACK defaults to 0. The
functionality is currently not supported for MPU enabled ports.
+ Generalize the FreeRTOS's Thread Local Storage (TLS) support so that it
is not tied to newlib and can be used with other c-runtime libraries also.
The default behavior for newlib support is kept same for backward
compatibility.
+ Add support to build and link FreeRTOS using CMake build system. Contributed
by @yhsb2k.
+ Add support to generate Software Bill of Materials (SBOM) for every release.
+ Add support for 16 MPU regions to the GCC Cortex-M33 ports.
+ Add ARM Cortex-M7 r0p0/r0p1 Errata 837070 workaround to ARM CM4 MPU ports.
The application writer needs to define configENABLE_ERRATA_837070_WORKAROUND
when using CM4 MPU ports on a Cortex-M7 r0p0/r0p1 core.
+ Add configSYSTICK_CLOCK_HZ to Cortex-M0 ports. This is needed to support
the case when the SysTick timer is not clocked from the same source as the CPU.
+ Add hardware stack protection support to MicroBlazeV9 port. This ensures that
the CPU immediately raises Stack Protection Violation exception as soon as any
task violates its stack limits. Contributed by @uecasm.
+ Introduce the configUSE_MINI_LIST_ITEM configuration option. When this
option is set to 1, ListItem_t and MiniLitItem_t remain separate types.
However, when configUSE_MINI_LIST_ITEM == 0, MiniLitItem_t and ListItem_t
are both typedefs of the same struct xLIST_ITEM. This addresses some issues
observed when strict-aliasing and link time optimization are enabled.
To maintain backwards compatibility, configUSE_MINI_LIST_ITEM defaults to 1.
+ Simplify prvInitialiseNewTask to memset newly allocated TCB structures
to zero, and remove code that set individual structure members to zero.
+ Add prototype for prvPortYieldFromISR to the POSIX port so that it builds
without any warning with -Wmissing-prototypes compiler option.
+ Add top of stack and end of stack to the task info report obtained using
vTaskGetInfo(). Contributed by @shreyasbharath.
+ Add a cap to the cRxLock and cTxLock members of the queue data structure.
These locks count the number items received and sent to the queue while
the queue was locked. These are later used to unblock tasks waiting on
the queue when the queue is unlocked. This PR caps the values of the
cRxLock and cTxLock to the number of tasks in the system because we cannot
unblock more tasks than there are in the system. Note that the same assert
could still be triggered is the application creates more than 127 tasks.
+ Changed uxAutoReload parameter in timer functions to xAutoReload. The
type is now BaseType_t. This matches the type of pdTRUE and pdFALSE.
The new function xTimerGetAutoReload() provides the auto-reload state as
a BaseType_t. The legacy function uxTimerGetAutoReload is retained with the
original UBaseType_t return value.
+ Fix support for user implementations of tickless idle that call
vTaskStepTick() with xExpectedIdleTime ticks to step. The new code
ensures xTickCount reaches xNextTaskUnblockTime inside xTaskIncrementTick()
instead of inside vTaskStepTick(). This fixes the typical case where a task
wakes up one tick late and a rare case assertion failure when xTickCount\
rolls over. Contributed by @jefftenney.
+ Fix deadlock in event groups when pvPortMalloc and vPortFree functions
are protected with a mutex. Contributed by @
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STM32G474 CMAKE VSCODE FREERTOS 导入
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STM32G474 CMAKE VSCODE FREERTOS 导入 (1950个子文件)
libarm_cortexM4l_math.a 5.18MB
libarm_cortexM4lf_math.a 5.11MB
iar_cortexM4b_math.a 3.02MB
iar_cortexM4l_math.a 3.01MB
iar_cortexM4bf_math.a 2.99MB
iar_cortexM4lf_math.a 2.98MB
portasm.asm 8KB
portASM.asm 6KB
port_asm.asm 6KB
portasm.asm 4KB
portext.asm 4KB
portasm.asm 4KB
portext.asm 3KB
Install.bat 7KB
moto_control.bin 41KB
arm_linear_interp_data.c 4.12MB
arm_common_tables.c 3.73MB
stm32g4xx_hal_hrtim.c 391KB
transform_tests_common_data.c 273KB
stm32g4xx_hal_tim.c 262KB
stm32g4xx_hal_i2c.c 245KB
tasks.c 218KB
stm32g4xx_hal_cryp.c 194KB
stm32g4xx_hal_uart.c 160KB
stm32g4xx_hal_adc.c 148KB
stm32g4xx_hal_spi.c 143KB
stm32g4xx_hal_tim_ex.c 138KB
stm32g4xx_hal_usart.c 126KB
stm32g4xx_hal_smartcard.c 125KB
stm32g4xx_hal_fdcan.c 124KB
queue.c 123KB
stm32g4xx_hal_irda.c 104KB
stm32g4xx_hal_smbus.c 98KB
stm32g4xx_hal_adc_ex.c 94KB
stm32g4xx_hal_qspi.c 92KB
stm32g4xx_hal_fmac.c 90KB
stm32g4xx_hal_sai.c 88KB
mpu_wrappers.c 84KB
stm32g4xx_hal_lptim.c 76KB
stm32g4xx_ll_adc.c 75KB
stm32g4xx_hal_rtc.c 75KB
stm32g4xx_hal_nand.c 73KB
filtering_test_common_data.c 64KB
stm32g4xx_hal_rtc_ex.c 63KB
stm32g4xx_hal_dac.c 63KB
stm32g4xx_hal_rcc_ex.c 63KB
stm32g4xx_hal_i2s.c 62KB
stream_buffer.c 60KB
stm32g4xx_hal_pcd.c 58KB
stm32g4xx_ll_tim.c 56KB
arm_cfft_radix4_q15.c 55KB
port.c 53KB
port.c 53KB
port.c 53KB
port.c 53KB
port.c 53KB
port.c 53KB
port.c 53KB
port.c 53KB
port.c 53KB
port.c 53KB
port.c 53KB
port.c 53KB
port.c 53KB
port.c 53KB
port.c 53KB
port.c 53KB
port.c 53KB
stm32g4xx_hal_nor.c 52KB
stm32g4xx_hal_rcc.c 51KB
stm32g4xx_hal_flash_ex.c 49KB
timers.c 49KB
stm32g4xx_hal_cordic.c 45KB
port.c 45KB
arm_fft_bin_data.c 43KB
stm32g4xx_hal_opamp.c 42KB
port.c 41KB
stm32g4xx_hal_dac_ex.c 41KB
port.c 39KB
port.c 39KB
stm32g4xx_hal_pwr_ex.c 38KB
port.c 38KB
stm32g4xx_hal_uart_ex.c 37KB
port.c 37KB
port.c 36KB
port.c 36KB
stm32g4xx_ll_rcc.c 36KB
port.c 36KB
arm_mat_inverse_f32.c 35KB
stm32g4xx_hal_dma.c 35KB
port.c 35KB
arm_cfft_radix4_f32.c 34KB
port.c 34KB
port.c 34KB
stm32g4xx_hal_sram.c 34KB
stm32g4xx_hal_comp.c 34KB
port.c 33KB
controller_test_common_data.c 33KB
stm32g4xx_ll_rtc.c 32KB
event_groups.c 31KB
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