M24256E资料，比原来的24256芯片少了硬件地址选择引脚资源-CSDN文库

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Features

• Compatible with following I

C bus modes:

– 1 MHz (Fast-mode Plus)

– 400 kHz (Fast-mode)

– 100 kHz (Standard-mode)

• Memory array:

– 256 Kbit (32 Kbytes) of EEPROM

– Page size: 64 bytes

– Additional identification page

• Single supply voltage:

– 1.6 to 5.5 V

• Operating temperature range

– From -40°C up to +85°C

• Write cycle time:

– Byte write within 5 ms

– Page write within 5 ms

• Random and sequential read modes

• Write protection of the whole memory array

• Configurable device address

• Enhanced ESD / latch-up protection

• More than 4 million write cycles

• More than 200-year data retention

• Package

– SO8N ECOPACK2

– TSSOP8 ECOPACK2

– UFDFPN8 ECOPACK2

– UFDFPN5 ECOPACK2

– RoHS-compliant and halogen-free (ECOPACK2)

TSSOP8

169 mil width

SO8N

150 mil width

UFDFPN8 (MC)

DFN8 - 2x3 mm

UFDFPN5 (MH)

DFN5 - 1.7x1.4 mm

Product status link

M24256E-F

256-Kbit serial I²C bus EEPROM with configurable device address

M24256E-F

Datasheet

DS12687 - Rev 2 - August 2022

For further information contact your local STMicroelectronics sales office.

www.st.com

2 Signal description

2.1 Serial clock (SCL)

SCL is an input. The signal applied on the SCL input is used to strobe the data available on SDA(in) and to output

the data on SDA(out).

2.2 Serial data (SDA)

SDA is an input/output used to transfer data in or data out of the device. SDA(out) is an open drain output that

may be wire-AND with other open drain or open collector signals on the bus. A pull-up resistor must be connected

from serial data (SDA) to V

(Figure 17 and Figure 18 indicate how to calculate the value of the pull-up resistor).

2.3 Write control (WC)

This input signal is useful for protecting the entire contents of the memory and the configurable device address

Write operations are enabled when write control (WC) is either driven low or left floating.

When write control (WC) is driven high, device select and address bytes are acknowledged, data bytes are not

acknowledged.

2.4 V

(ground)

is the reference for the V

supply voltage.

2.5 Supply voltage (V

)

2.5.1 Operating supply voltage (V

)

Prior to selecting the memory and issuing instructions to it, a valid and stable V

voltage within the specified

(min), V

(max)] range must be applied (see Operating conditions in Section 9 DC and AC parameters). In

order to secure a stable DC supply voltage, it is recommended to decouple the V

line with a suitable capacitor

(from 10 nF to 100 nF) close to the V

/ V

package pins.

This voltage must remain stable and valid until the end of the transmission of the instruction and, for a write

instruction, until the completion of the internal write cycle (t

2.5.2 Power-up conditions

The V

voltage has to rise continuously from 0 V up to the minimum V

operating voltage (see Table 7 in

Section 9 DC and AC parameters).

Once the V

is greater than, or equal to, the minimum V

level, the master must wait for at least T

before

sending the first command to the device. See Table 13 for the value of the wake-up time parameter.

2.5.3 Device reset

In order to prevent inadvertent write operations during power-up, a power-on-reset (POR) circuit is included.

At power-up, the device does not respond to any instruction until V

has reached the internal reset

threshold voltage. This threshold is lower than the minimum V

operating voltage (see Operating conditions

in Section 9 DC and AC parameters). When V

passes over the POR threshold, the device is reset and enters

the Standby Power mode; however, the device must not be accessed until V

reaches a valid and stable DC

voltage within the specified [V

(min), V

(max)] range (see Operating conditions in Section 9 DC and AC

parameters).

In a similar way, during power-down (continuous decrease in V

), the device must not be accessed when V

drops below V

(min). When V

drops below the power-on-reset threshold voltage, the device stops responding

to any instruction sent to it.

M24256E-F

Signal description

DS12687 - Rev 2

page 4/46

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