/*****************************************************************************/
/* COPYRIGHT (c) BJTU&EPOWER 2005-2009 */
/* */
/* FILE NAME : 5460_I.c */
/* */
/* AUTHOR : EPOWER TIME : 06/05 */
/* */
/* DESCRIPTION : Driver for 5460 */
/* */
/* NOTES : */
/* */
/* HISTORY : */
/* */
/* Author | Time | Version | description */
/* -------------|------------|---------------|------------------------------ */
/* WenFen | 05/06 | 1.0.0 | Build the Module */
/* -------------|------------|---------------|------------------------------ */
/* LaoLi | 06/05 | 1.0.0 | Revise Format */
/* -------------|------------|---------------|------------------------------ */
/* LaoLi | 07/05 | 1.0.1 | Change I from RMS to average */
/* -------------|------------|---------------|------------------------------ */
/* LaoLi | 08/01 | 1.0.1 | Revise init function */
/* -------------|------------|---------------|------------------------------ */
/* LaoLi | 08/01 | 1.0.2 | Add Check function */
/* -------------|------------|---------------|------------------------------ */
/* KeZQ | 09/06 | 1.0.3 | modified funtion disription */
/*****************************************************************************/
#ifndef CUR_CS_I_H
#define CUR_CS_I_H
#include "5460_I.h"
#endif /* CUR_CS_I_H */
LWord glwd_dis_cnt; /* counter for FLAG_DIS energy */
LWord glwd_chr_cnt; /* counter for oppsite energy */
Word gwd_soc; /* soc measured in 1/200 */
Word gwd_soc_bak;
Word gwd_cur; /* current of 5460 */
Byte gby_eff; /* charge efficiency of 5460 */
Word gwd_energy;
Byte lby_flg_chr_or_dis; /* a flag indicates if result is FLAG_DIS or
* oppsite */
Word gwd_cur_ins;
Byte gby_flag_chrdis; /* a flag indicates if result is FLAG_DIS or oppsite */
Byte gby_flag_chrdis_ins;
float gf_cur;
float gf_k;
LWord glwd_chr_thrd_cur; /* energy threshold for charging */
LWord glwd_dis_thrd_cur; /* energy threshold for discharging */
LWord glwd_ah_chg;
LWord glwd_ah_dch;
const Byte cnst_cmd_cur[4] =
{
RDCUROFF, RDCURGAIN, RDVOLOFF, RDVOLGAIN
};
CUR_INIT_CONFIG cur_cfg;
void init_sp_cur(void); /* initiallize serial port of 5460 */
void wr_byte_cur(Byte bak); /* write a byte to 5460 */
void wr_array_cur(Byte* p_array, Byte num); /* write an array to 5460 */
void rd_array_cur(Byte* p_target,Byte cmd); /* read an array from 5460 */
void wr_statue_reg(void); /* write statue register */
void calc_soc(void); /* calculate soc */
void calc_avrg_cur(Word* p_cur); /* calculate average current*/
Byte check_status_reg(void); /* check status register */
//************ init current *********************//
Byte init_cur(CUR_INIT_CONFIG* p_config, Word* p_err_code)
{
Byte i,j,k;
Byte lby_array[4],lby_array_bak[4];
Byte flag = FLAG_FAIL;
Byte cnt = 0;
CLR_PIN_5460(CUR_SCK);
CLR_PIN_5460(CUR_SDI);
CLR_PIN_5460(CUR_RST);
CLR_PIN_5460(CUR_CS);
/* config data-direction of pins connecting to 5460 */
//CUR_POWDDR= 1;
CUR_SCKDDR = 1;
CUR_SDIDDR = 1;
CUR_RSTDDR = 1;
CUR_CSDDR = 1;
CUR_SDODDR = 0;
CUR_INT = 0;
//CUR_POW = 1;
CUR_SCK = 1;
CUR_SDI = 1;
CUR_RST = 1;
CUR_CS = 1;
//CUR_POW = 0;
CUR_SCK = 0;
CUR_SDI = 0;
CUR_RST = 0;
CUR_CS = 0;
/* disable external interrupt */
// Regs.irqcr.bit.irqen = 0;
/* power up 5460 */
//CLR_PIN_5460(CUR_POW);
/*reset 5460*/
CLR_PIN_5460(CUR_RST);
delay_long();
SET_PIN_5460(CUR_RST);
delay_ms(10);
/* write config register */
lby_array[0] = WRCONFIG;
lby_array[1] = 0x00;
lby_array[2] = 0x00;
lby_array[3] = 0x81; /* start reset,set k=1 */
for (i = 0 ; i < 3; i++)
{
init_sp_cur();
wr_array_cur(lby_array, 4);
/* check if register has been write correct */
init_sp_cur();
rd_array_cur(lby_array_bak,RDCONFIG);
if ( (lby_array[1] == lby_array_bak[1])
&& (lby_array[2] == lby_array_bak[2])
&& ( (lby_array[3] & 0x7F) == lby_array_bak[3]) ) /* discard RS
* bit */
{
*p_err_code &= ~WR_REG5460_ERR; //OK
break;
}
else
{
*p_err_code |= WR_REG5460_ERR; //FAIL
}
}
/* clear all bits in statue register */
init_sp_cur();
wr_statue_reg();
/* write current/voltage offset/gain register */
for (i = 0; i < 4; i++)
{
lby_array[0] = p_config->gain_off[cnt];
lby_array[1] = p_config->gain_off[cnt + 1];
lby_array[2] = p_config->gain_off[cnt + 2];
lby_array[3] = p_config->gain_off[cnt + 3];
for (j = 0; j < 3; j++)
{
/* write register */
init_sp_cur();
wr_array_cur(lby_array, 4);
init_sp_cur();
rd_array_cur(lby_array_bak, cnst_cmd_cur[cnt / 4]);
/* check if written registers are correct */
for (k = 0; k < 3; k++)
{
if ( lby_array[k + 1] != lby_array_bak[k + 1])
{
*p_err_code |= WR_REG5460_ERR; //FAIL
break;
}
}
if (k == 3)
{
/* registers are correct */
*p_err_code &= ~WR_REG5460_ERR; //OK
cnt += 4;
break;
}
else
{
*p_err_code |= ~WR_REG5460_ERR; //FAIL
}
}
/* when write three times, write next */
if ( ((*p_err_code) & WR_REG5460_ERR) == WR_REG5460_ERR)
{
cnt += 4;
}
}
if (cnt != 16)
{
return FLAG_FAIL;
}
/* write mask */
lby_array[0] = WRMASK;
lby_array[1] = 0x80; /* DYDT interrupt enable */
lby_array[2] = 0;
lby_array[3] = 0x00;
for (i = 0 ; i < 3; i++)
{
init_sp_cur();
wr_array_cur(lby_array, 4);
/* check if register has been write correct */
init_sp_cur();
rd_array_cur(lby_array_bak,RDMASK);
if ( (lby_array[1] == lby_array_bak[1])
&& (lby_array[2] == lby_array_bak[2])
&& ( lby_array[3] == lby_array_bak[3]) )
{
*p_err_code &= 0xFFFB; //OK
break;
}
else
{
*p_err_code |= 0x0004; //FAIL
}
}
/* write cycle-count register */
if ((p_config->cycle[0]) == WRCC)
{
lby_array[0] = p_config->cycle[0];
lby_array[1] = p_config->cycle[1];
lby_array[2] = p_config->cycle[2];
lby_array[3] = p_config->cycle[3];
}
else
{
/* default v
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