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Nios II C2H FIR Design Example
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Requirements:
Quartus II version 6.0
Nios II version 6.0
C2H Compiler version 6.0
Full-Featured Example Design (Available with the Nios II EDS)
Design Files
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Software:
"fir.h" - Contains all the configurable settings for the example design
"fir_hw.c" - Contains the hardware version of the symmetric FIR filter
"fir_sw.c" - Same as fir_hw.c only this will not be accelerated
"fir_main.c" - Contains the software that will create the data buffers, timing
of the hardware and software FIR algorithms, console output, and
verification of results
Filter Coefficients and Buffer Data:
"lpf_15_hanning.dat" - low pass, tap length 15, hanning window, 2^15 post
scaler divider coefficients
"hpf_15_hanning.dat" - high pass, tap length 15, hanning window, 2^13 post
scaler divider coefficients
"lpf_16_hanning.dat" - low pass, tap length 16, hanning window, 2^15 post
scaler divider coefficients
"hpf_16_hanning.dat" - high pass, tap length 16, hanning window, 2^14 post
scaler divider coefficients
"input1.dat" - ROUND(10000*SIN((2*PI*t)/2.5),0) - 33
Wave 1: Amplitude 10000, f = 4MHz
Wave 2: Amplitude -33, f = 0MHz
Wave 1 and 2: Length of 5 samples
"input2.dat" - ROUND(100*SIN((2*PI*t)/4),0) +
ROUND(1000*SIN((2*PI*t)/64),0)
Wave 1: Amplitude 100, f = 2.5MHz
Wave 2: Amplitude 1000, f = 156.25kHz
Wave 1 and 2: Length of 64 samples
Instructions for rebuilding and running the example.
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1.) Copy a Nios II Full-Featured design from the installation folder to C:
This design can be found at the following location:
<installation folder>\examples\<vhdl or verilog>\<board>\full_featured
2.) Open the Nios II IDE and create a new blank project as follows:
- Click "New"->"C/C++ Application"
- In the "Name" field type "FIR"
- Click "Browse..." and navigate to the folder location you used in
step 1 and select the .ptf file at that location
- Click "Finish"
3.) Set the application project to the highest optimization level as follows:
- Right click the project "FIR" in the workspace and select "Properties"
- Click "C/C++ Build"
- Click "General" under the Tool Settings tab
- From the Optimization Levels pulldown select "Optimize most (-O3)"
- Click "OK"
4.) Set the system library project to the highest optimization level and
configure the high resolution timer as follows:
- Right click the project "FIR_syslib" in the workspace and select
"Properties"
- Click "C/C++ Build"
- Click "General" under the Tool Settings tab
- From the Optimization Levels pulldown select "Optimize most (-O3)"
- Click "System Library"
- From the Timestamp timer pulldown select "high_res_timer"
- Click "OK"
5.) Copy the files provided source files contained in the source_files folder
to the application project folder at the following location:
<hardware project folder (step 1)>\software\FIR
6.) Right click the "FIR" project and select refresh (updates the workspace so
that the files you copied in step 5 appear)
7.) Open "fir_hw.c" in the FIR project
8.) Locate the function "FIR_HW" located on line 42
9.) Highlight the entire name "FIR_HW", right click the name, and select
"Accelerate with the Nios II C2H Compiler"
10.) Verify in the C2H view tab that appeared at the bottom the following are
selected:
- "Build software, generate SOPC Builder system, and run Quartus II
compilation"
- "Use hardware accelerator in place of software implementation. Flush
data cache before each call"
11.) Right click the FIR project and select "Build Project"
Note: This will add the hardware accelerator, compile the entire hardware
project, and compile the software projects so this may take some
time
12.) Return to Quartus II and configure the FPGA with the Quartus II Programmer
- Click "Tools"->"Programmer"
- Ensure "full_featured.sof" is selected (from the folder in step 1)
- Enable the "Program/Configure" checkbox
- Click "Start"
13.) Run the FIR project in the Nios II IDE as follows:
- Click the FIR project and select "Run As"->"Run"
- Click "Nios II Hardware"
- Click "New"
- Verify the Project selected is "FIR", if this is not the case select it
with "Browse..."
- Verify that "Validate Nios II system ID before software download" is
selected
- Click "Target Connection"
- Verify that the correct JTAG cable is selected
- Verify that the "Nios II Terminal communication device" states
"jtag_uart"
- Click "Run" and observe the software running from the console