static const char * HSimCopyRightNotice = "Copyright 2004-2005, Xilinx Inc. All rights reserved.";
#ifdef __MINGW32__
#include "xsimMinGW.h"
#else
#include "xsim.h"
#endif
static HSim__s6* IF0(HSim__s6 *Arch,const char* label,int nGenerics,
va_list vap)
{
extern HSim__s6 * createworkMa_fifo__tb__v(const char*);
HSim__s6 *blk = createworkMa_fifo__tb__v(label);
return blk;
}
static HSim__s6* IF1(HSim__s6 *Arch,const char* label,int nGenerics,
va_list vap)
{
extern HSim__s6 * createworkM_gray_counter(const char*);
HSim__s6 *blk = createworkM_gray_counter(label);
return blk;
}
static HSim__s6* IF2(HSim__s6 *Arch,const char* label,int nGenerics,
va_list vap)
{
extern HSim__s6 * createworkMa_fifo(const char*);
HSim__s6 *blk = createworkMa_fifo(label);
return blk;
}
static HSim__s6* IF3(HSim__s6 *Arch,const char* label,int nGenerics,
va_list vap)
{
extern HSim__s6 * createworkMglbl(const char*);
HSim__s6 *blk = createworkMglbl(label);
return blk;
}
class _top : public HSim__s6 {
public:
_top() : HSim__s6(false, "_top", "_top", 0, 0, HSim::VerilogModule) {}
HSimConfigDecl * topModuleInstantiate() {
HSimConfigDecl * cfgvh = 0;
cfgvh = new HSimConfigDecl("default");
(*cfgvh).registerFuseLibList("unisims_ver;xilinxcorelib_ver");
(*cfgvh).addVlogModule("work","aFifo_tb_v", (HSimInstFactoryPtr)IF0);
(*cfgvh).addVlogModule("work","GrayCounter", (HSimInstFactoryPtr)IF1);
(*cfgvh).addVlogModule("work","aFifo", (HSimInstFactoryPtr)IF2);
(*cfgvh).addVlogModule("work","glbl", (HSimInstFactoryPtr)IF3);
HSim__s5 * topvl = 0;
extern HSim__s6 * createworkMa_fifo__tb__v(const char*);
topvl = (HSim__s5*)createworkMa_fifo__tb__v("aFifo_tb_v");
topvl->moduleInstantiate(cfgvh);
addChild(topvl);
extern HSim__s6 * createworkMglbl(const char*);
topvl = (HSim__s5*)createworkMglbl("glbl");
topvl->moduleInstantiate(cfgvh);
addChild(topvl);
return cfgvh;
}
};
main(int argc, char **argv) {
HSimDesign::initDesign();
globalKernel->getOptions(argc,argv);
HSim__s6 * _top_i = 0;
try {
HSimConfigDecl *cfg;
_top_i = new _top();
cfg = _top_i->topModuleInstantiate();
return globalKernel->runTcl(cfg, _top_i, "_top", argc, argv);
}
catch (HSimError& msg){
try {
globalKernel->error(msg.ErrMsg);
return 1;
}
catch(...) {}
return 1;
}
catch (...){
globalKernel->fatalError();
return 1;
}
}
没有合适的资源?快使用搜索试试~ 我知道了~
fifo.rar_fifo
共60个文件
bin:10个
ref:5个
obj:4个
1.该资源内容由用户上传,如若侵权请联系客服进行举报
2.虚拟产品一经售出概不退款(资源遇到问题,请及时私信上传者)
2.虚拟产品一经售出概不退款(资源遇到问题,请及时私信上传者)
版权申诉
0 下载量 7 浏览量
2022-09-24
15:49:44
上传
评论
收藏 356KB RAR 举报
温馨提示
Asynchronous FIFO source code
资源推荐
资源详情
资源评论
收起资源包目录
fifo.rar (60个子文件)
fifo
GrayCounter.xst 79B
xst
projnav.tmp
dump.xst
aFifo.prj
ngx
notopt
opt
ntrc.scr 1KB
work
hdllib.ref 127B
vlg2D
a_fifo.bin 9KB
vlg7F
_gray_counter.bin 3KB
afifo_tb_v_isim_beh.wfs 868B
aFifo.ngc 14KB
isim.log 1KB
fifo.ise 261KB
simulate_dofile.log_back 266B
aFifo_tb.v 1KB
aFifo.xst 1KB
aFifo.syr 22KB
_xmsgs
xst.xmsgs 2KB
fuse.xmsgs 526B
isimwavedata.xwv 24KB
GrayCounter_summary.html 2KB
aFifo.stx 858B
Async_fifo.v 4KB
.lso 6B
isim.hdlsourcefiles 240B
aFifo.prj 60B
GrayCounter.prj 31B
isim
temp
hdllib.ref 436B
vlg47
a_fifo__tb__v.bin 3KB
hdpdeps.ref 774B
vlg2D
glbl.bin 3KB
a_fifo.bin 9KB
vlg7F
_gray_counter.bin 3KB
work
a_fifo__tb__v
xsima_fifo__tb__v.cpp 3KB
mingw
a_fifo__tb__v.obj 25KB
a_fifo__tb__v.h 964B
a_fifo
mingw
a_fifo.obj 46KB
a_fifo.h 1011B
hdllib.ref 436B
vlg47
a_fifo__tb__v.bin 3KB
glbl
mingw
glbl.obj 25KB
glbl.h 946B
_gray_counter
_gray_counter.h 1017B
mingw
_gray_counter.obj 27KB
hdpdeps.ref 754B
vlg2D
glbl.bin 3KB
a_fifo.bin 9KB
vlg7F
_gray_counter.bin 3KB
aFifo_summary.html 3KB
aFifo.lso 6B
GrayCounter.stx 786B
xilinxsim.ini 16B
aFifo_tb_v_isim_beh.exe 267KB
simulate_dofile.log 13B
fifo.ise_ISE_Backup 261KB
aFifo_tb_v_beh.prj 132B
gray_counter.v 1KB
aFifo.ngr 15KB
isim.tmp_save
_1 3KB
fifo.restore 52KB
aFifo.cmd_log 242B
fifo.ntrc_log 57B
isim.cmd 14B
aFifo_tb_v_stx.prj 152B
共 60 条
- 1
资源评论
小贝德罗
- 粉丝: 71
- 资源: 1万+
上传资源 快速赚钱
- 我的内容管理 展开
- 我的资源 快来上传第一个资源
- 我的收益 登录查看自己的收益
- 我的积分 登录查看自己的积分
- 我的C币 登录后查看C币余额
- 我的收藏
- 我的下载
- 下载帮助
安全验证
文档复制为VIP权益,开通VIP直接复制
信息提交成功