inline-in-iar_c.rar_iar inline 函数_iar 内联函数_msp430f4152

/*msp430f4152时钟的初始化*/ /********************************************/ /*****DCOPLUS = 0: fDCOCLK = (N+1)*fACLK*****/ /****DCOPLUS = 1: fDCOCLK = D*(N+1)*fACLK****/ /********************************************/ #pragma inline void osc_4152_initial(void) { //DCO output is divided (DCOPLUS=0) //LFTX1 mode is low frequency mode (XTS_FLL=0) //XIN Cap = XOUT Cap = 10pf(根据参考资料定义，不是根据库文件) FLL_CTL0 |= DCOPLUS + OSCCAP_3; //SMCLK disable //ACLK Divide By 1 //Select DCO for CPU MCLK FLL_CTL1 |= SMCLKOFF + SELM_DCO + FLL_DIV_1; //low frequence source select is 32768Hz FLL_CTL2 |= LF1XT1S_0; //8*(61+1)*32768=16.25MHz（实际频率是16MHz） SCFQCTL = 121; //N = 61 SCFI0 |= FLLD_2 + FN_3; SCFI1 |= 0xF0; } /***************************************************/ /********************测试函数区*********************/ /***************************************************/ #pragma inline void mclk_out_on(void) { //P1.1/TA0.0/MCLK/S30 P1SEL |= BBIT1; P1DIR |= BBIT1; } #pragma inline void mclk_out_off(void) { //P1.1/TA0.0/MCLK/S30 P1SEL &= ~BBIT1; P1DIR &= ~BBIT1; } #pragma inline void aclk_out_on(void) { //P1.6/ACLK/CA0 P1SEL |= BBIT6; P1DIR |= BBIT6; } #pragma inline void aclk_out_off(void) { //P1.6/ACLK/CA0 P1SEL &= ~BBIT6; P1DIR &= ~BBIT6; } /***************************************************/ /********************测试函数区*********************/ /***************************************************/ /*4152与CC1101连接所用管脚的初始化*/ #pragma inline void gpio_4152_cc1101(void) { //P4.0 P4.1 P4.2 为IO口功能 P4SEL &= ~BBIT0; P4SEL &= ~BBIT1; P4SEL &= ~BBIT2; //P2.7 P2.6 P2.5 为IO口功能 P2SEL &= ~BBIT5; P2SEL &= ~BBIT6; P2SEL &= ~BBIT7; P4DIR &= ~BBIT0; //P4.0 SO IN P4DIR |= BBIT1; //P4.1 SCLK OUT P4DIR |= BBIT2; //P4.2 CSN OUT P2DIR |= BBIT7; //P2.7 SI OUT P2DIR &= ~BBIT6; //P2.6 GDO2 IN P2DIR &= ~BBIT5; //P2.5 GDO0 IN } /*4152与RF电路供电电源芯片U3(ADP124)的连接*/ #pragma inline void gpio_4152_u3(void) { //P3.3 U3_EN OUT P3SEL &= ~BBIT3; P3DIR |= BBIT3; } /*4152与U6(RFPA0133)控制信号的连接*/ #pragma inline void gpio_4152_u6(void) { P3SEL &= ~BBIT4; //G8 P3SEL &= ~BBIT5; //G16 P6SEL &= ~BBIT1; //PD P3DIR |= BBIT4; //P3.4 G8 OUT P3DIR |= BBIT5; //P3.5 G16 OUT P6DIR |= BBIT1; //P6.1 PD OUT } /*4152与u5、u7(AS179)的连接管脚*/ #pragma inline void gpio_4152_u5_u7(void) { P6SEL &= ~BBIT2; //V1CTRL P6SEL &= ~BBIT3; //V2CTRL P6DIR |= BBIT2; //P6.2 V1CTRL OUT P6DIR |= BBIT3; //P6.3 V2CTRL OUT }