GPRS.rar_GSM通讯代码

#include "../inc/def.h" #include "../inc/config.h" #include "../inc/board.h" #include "../inc/slib.h" #include "../inc/utils.h" #include "2410addr.h" EnvParams Env; #define ROM_SIZE SIZE_2M void PortInit(void) { //CAUTION:Follow the configuration order for setting the ports. // 1) setting value(GPnDAT) // 2) setting control register (GPnCON) // 3) configure pull-up resistor(GPnUP) //32bit data bus configuration //*** PORT A GROUP //Ports : GPA22 GPA21 GPA20 GPA19 GPA18 GPA17 GPA16 GPA15 GPA14 GPA13 GPA12 //Signal : nFCE OUT nFRE nFWE ALE CLE nGCS5 nGCS4 nGCS3 nGCS2 nGCS1 //Binary : 1 0 1 , 1 1 1 1 , 1 1 1 1 //Ports : GPA11 GPA10 GPA9 GPA8 GPA7 GPA6 GPA5 GPA4 GPA3 GPA2 GPA1 GPA0 //Signal : ADDR26 ADDR25 ADDR24 ADDR23 ADDR22 ADDR21 ADDR20 ADDR19 ADDR18 ADDR17 ADDR16 ADDR0 //Binary : 1 1 1 1 , 1 1 1 1 , 1 1 1 1 rGPACON = 0x5fffff ; //**** PORT B GROUP //Ports : GPB10 GPB9 GPB8 GPB7 GPB6 GPB5 GPB4 GPB3 GPB2 GPB1 GPB0 //Signal : nXDREQ0 nXDACK0 nXDREQ1 nXDACK1 nSS_KBD nDIS_OFF L3CLOCK L3DATA L3MODE nIrDATXDEN Keyboard //Setting: INPUT OUTPUT INPUT OUTPUT INPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT //Binary : 00 , 01 00 , 01 00 , 01 01 , 01 01 , 01 01 rGPBCON = 0x044555 ; rGPBUP = 0x7ff ; // The pull up function is disabled GPB[10:0] //*** PORT C GROUP //Ports : GPC15 GPC14 GPC13 GPC12 GPC11 GPC10 GPC9 GPC8 GPC7 GPC6 GPC5 GPC4 GPC3 GPC2 GPC1 GPC0 //Signal : VD7 VD6 VD5 VD4 VD3 VD2 VD1 VD0 LCDVF2 LCDVF1 LCDVF0 VM VFRAME VLINE VCLK LEND //Binary : 10 10 , 10 10 , 10 10 , 10 10 , 10 10 , 10 10 , 10 10 , 10 10 rGPCCON = 0xaaaaaaaa; rGPCUP = 0xffff; // The pull up function is disabled GPC[15:0] //*** PORT D GROUP //Ports : GPD15 GPD14 GPD13 GPD12 GPD11 GPD10 GPD9 GPD8 GPD7 GPD6 GPD5 GPD4 GPD3 GPD2 GPD1 GPD0 //Signal : VD23 VD22 VD21 VD20 VD19 VD18 VD17 VD16 VD15 VD14 VD13 VD12 VD11 VD10 VD9 VD8 //Binary : 10 10 , 10 10 , 10 10 , 10 10 , 10 10 , 10 10 , 10 10 ,10 10 rGPDCON = 0xaaaaaaaa; rGPDUP = 0xffff; // The pull up function is disabled GPD[15:0] //*** PORT E GROUP //Ports : GPE15 GPE14 GPE13 GPE12 GPE11 GPE10 GPE9 GPE8 GPE7 GPE6 GPE5 GPE4 //Signal : IICSDA IICSCL SPICLK SPIMOSI SPIMISO SDDATA3 SDDATA2 SDDATA1 SDDATA0 SDCMD SDCLK I2SSDO //Binary : 10 10 , 10 10 , 10 10 , 10 10 , 10 10 , 10 10 , //------------------------------------------------------------------------------------------------------- //Ports : GPE3 GPE2 GPE1 GPE0 //Signal : I2SSDI CDCLK I2SSCLK I2SLRCK //Binary : 10 10 , 10 10 rGPECON = 0xa66aaaaa; //GPE11 input, GPE13 output rGPEUP = 0xffff; // The pull up function is disabled GPE[15:0] rGPEDAT = 0; //GPE11,13 output 0 //*** PORT F GROUP //Ports : GPF7 GPF6 GPF5 GPF4 GPF3 GPF2 GPF1 GPF0 //Signal : nLED_8 nLED_4 nLED_2 nLED_1 nIRQ_PCMCIA EINT2 KBDINT EINT0 //Setting: Output Output Output Output EINT3 EINT2 EINT1 EINT0 //Binary : 01 01 , 01 01 , 10 10 , 10 10 rGPFCON = 0x5500; // GPF0~3 input rGPFUP = 0xff; // The pull up function is disabled GPF[7:0] //*** PORT G GROUP //Ports : GPG15 GPG14 GPG13 GPG12 GPG11 GPG10 GPG9 GPG8 GPG7 GPG6 //Signal : nYPON YMON nXPON XMON EINT19 DMAMODE1 DMAMODE0 DMASTART KBDSPICLK KBDSPIMOSI //Setting: nYPON YMON nXPON XMON Input Intput Input Input SPICLK1 SPIMOSI1 //Binary : 11 11 , 11 11 , 00 00 , 00 00 , 11 11 //----------------------------------------------------------------------------------------- //Ports : GPG5 GPG4 GPG3 GPG2 GPG1 GPG0 //Signal : KBDSPIMISO LCD_PWREN EINT11 nSS_SPI IRQ_LAN IRQ_PCMCIA //Setting: SPIMISO1 LCD_PWRDN Input Input Input Input //Binary : 11 11 , 00 00 , 00 00 rGPGCON = 0xff001318; //GPG0,1,3 input, GPG2,6 output GPG5,7,8,9,10,11 input rGPGUP = 0xffff; // The pull up function is disabled GPG[15:0] rGPGDAT = 0; //GPG2,6 output0 //*** PORT H GROUP //Ports : GPH10 GPH9 GPH8 GPH7 GPH6 GPH5 GPH4 GPH3 GPH2 GPH1 GPH0 //Signal : CLKOUT1 CLKOUT0 UCLK nCTS1 nRTS1 RXD1 TXD1 RXD0 TXD0 nRTS0 nCTS0 //Binary : 10 , 10 10 , 11 11 , 10 10 , 10 10 , 10 10 rGPHCON = 0x2afaaa; //rGPHUP = 0x7ff; // The pull up function is disabled GPH[10:0] rGPHUP = 0x000; // The pull up function is enabled GPH[10:0] //External interrupt will be falling edge triggered. rEXTINT0 = 0x22222222; // EINT[7:0] rEXTINT1 = 0x22222242; // EINT[15:8],EINT9 rising edge rEXTINT2 = 0x22222222; // EINT[23:16] } void MemCfgInit(void) { //rCLKCON |= 0xffff0; //enable nand flash control, initilize ecc, chip disable, rNFCONF = (1<<15)|(1<<12)|(1<<11)|(7<<8)|(7<<4)|(7); } #include "../inc/mmu.h" /* SDRAM地址范围:0x30000000~0x33ffffff 共64M 0x30000000~0x337fffff为非cache区,可用作LCD缓冲, USB的DMA方式接收数据的缓冲和音频输入输出DMA缓冲及其它DMA方式的实验 0x33800000~0x33ffffff为cache区,可为程序及变量和栈空间 */ //以M对齐 static MMU_Table mmu_table[] = { {0x00000000, 0x00100000, DRAM_END-SIZE_1M, RW_CB}, //inter-rom ram // {0x00000000, 0x00100000, (U32)__ENTRY, RW_CB}, //inter-rom ram //!!! Important note, redirect IRQ vector to reset entry !!! {0x08000000, 0x0ff00000, 0x00000000, RW_NCNB}, //bank0 {0x10000000, 0x17f00000, 0x10000000, RW_NCNB}, //bank2 {0x18000000, 0x1ff00000, 0x18000000, RW_NCNB}, //bank3 {0x20000000, 0x27f00000, 0x20000000, RW_NCNB}, //bank4 {0x28000000, 0x2ff00000, 0x28000000, RW_NCNB}, //bank5 {0x30000000, 0x33800000, 0x30000000, (AP_RO|DOMAIN0|NCNB|DESC_SEC)}, //bank6-1 {0x33800000, 0x33f00000, 0x33800000, RW_CB}, //bank6-2 {0x38000000, 0x3ff00000, 0x38000000, RW_NCNB}, //bank7 {0x40000000, 0x5af00000, 0x40000000, RW_NCNB}, //SFR {0x5b000000, 0x7ff00000, 0x5b000000, RW_FAULT}, //not used {0x80000000, 0x87f00000, 0x08000000, RW_NCNB}, //bank1 {0x88000000, 0xfff00000, 0x88000000, RW_FAULT}, //not used {0, 0, 0, 0} }; void BoardInitStart(void) { MMU_Init(mmu_table); memcpy((char *)(DRAM_END-SIZE_1M), (char *)__ENTRY, 0x1000); } void BoardInitEnd(void) { } void CacheDisable(void) { MMU_DisableDCache(); } void CacheEnable(void) { MMU_EnableDCache(); } void CacheFlush(void) { MMU_DCacheCleanInvalidateAll(); } void EnableIrq(int bit) { rINTMSK &= ~(bit); } void DisableIrq(int bit) { rINTMSK |= (bit); } /***********************下面是时钟相关函数**********************************/ #define EXT_OSC_CLK 12000000 static struct{ U32 mclk; U32 pclk; U32 sclk; U32 freq; } ClkPara; static U32 clk_div_val; static void ChangeClockDivider(void) { // hdivn,pdivn FCLK:HCLK:PCLK // 0,0 1:1:1 // 0,1 1:1:2 // 1,0 1:2:2 // 1,1 1:2:4 rCLKDIVN = clk_div_val ;//(hclk_div<<1) | pclk_div; if(clk_div_val&2) MMU_SetAsyncBusMode(); else MMU_SetFastBusMode(); } static void set_pll(void) { U32 old_freq; if(ClkPara.mclk>255) ClkPara.mclk = 255; if(ClkPara.pclk>63) ClkPara.pclk = 63; if(ClkPara.sclk>3) ClkPara.sclk = 3; old_freq = ClkPara.freq; ClkPara.freq = (EXT_OSC_CLK*(ClkPara.mclk+8))/((ClkPara.pc