/*********************************************************************************************************
* @file: core_cm3.c
* @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Source File
* @version: V1.20
* @date: 22. May 2009
*--------------------------------------------------------------------------------------------------------
*
* Copyright (C) 2009 ARM Limited. All rights reserved.
*
* ARM Limited (ARM) is supplying this software for use with Cortex-Mx
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
*********************************************************************************************************/
#include <stdint.h>
/*
* define compiler specific symbols
*/
#if defined ( __CC_ARM )
#define __ASM __asm /*!< asm keyword for armcc */
#define __INLINE __inline /*!< inline keyword for armcc */
#elif defined ( __ICCARM__ )
#define __ASM __ asm /*!< asm keyword for iarcc */
#define __INLINE inline /*!< inline keyword for iarcc. */
/* Only avaiable in High */
/* optimization mode! */
#elif defined ( __GNUC__ )
#define __ASM _asm /*!< asm keyword for gcc */
#define __INLINE inline /*!< inline keyword for gcc */
#elif defined ( __TASKING__ )
#define __ASM __asm /*!< asm keyword for TASKING */
/*Compiler */
#define __INLINE inline /*!< inline keyword for TASKING */
/* Compiler */
#endif
#if defined ( __CC_ARM )
/*---------------------------------RealView Compiler ---------------------------------------------------*/
/*********************************************************************************************************
* @brief Return the Process Stack Pointer
*
* @param none
* @return uint32_t ProcessStackPointer
*
* Return the actual process stack pointer
*********************************************************************************************************/
__ASM uint32_t __get_PSP(void)
{
mrs r0, psp
bx lr
}
/**********************************************************************************************************
* @brief Set the Process Stack Pointer
*
* @param uint32_t Process Stack Pointer
* @return none
*
* Assign the value ProcessStackPointer to the MSP
* (process stack pointer) Cortex processor register
*********************************************************************************************************/
__ASM void __set_PSP(uint32_t topOfProcStack)
{
msr psp, r0
bx lr
}
/**********************************************************************************************************
* @brief Return the Main Stack Pointer
*
* @param none
* @return uint32_t Main Stack Pointer
*
* Return the current value of the MSP (main stack pointer)
* Cortex processor register
*********************************************************************************************************/
__ASM uint32_t __get_MSP(void)
{
mrs r0, msp
bx lr
}
/**********************************************************************************************************
* @brief Set the Main Stack Pointer
*
* @param uint32_t Main Stack Pointer
* @return none
*
* Assign the value mainStackPointer to the MSP
* (main stack pointer) Cortex processor register
*********************************************************************************************************/
__ASM void __set_MSP(uint32_t mainStackPointer)
{
msr msp, r0
bx lr
}
/**********************************************************************************************************
* @brief Reverse byte order in unsigned short value
*
* @param uint16_t value to reverse
* @return uint32_t reversed value
*
* Reverse byte order in unsigned short value
*********************************************************************************************************/
__ASM uint32_t __REV16(uint16_t value)
{
rev16 r0, r0
bx lr
}
/**********************************************************************************************************
* @brief Reverse byte order in signed short value with sign extension to integer
*
* @param int16_t value to reverse
* @return int32_t reversed value
*
* Reverse byte order in signed short value with sign extension to integer
*********************************************************************************************************/
__ASM int32_t __REVSH(int16_t value)
{
revsh r0, r0
bx lr
}
#if (__ARMCC_VERSION < 400000)
/**********************************************************************************************************
* @brief Remove the exclusive lock created by ldrex
*
* @param none
* @return none
*
* Removes the exclusive lock which is created by ldrex.
*********************************************************************************************************/
__ASM void __CLREX(void)
{
clrex
}
/**********************************************************************************************************
* @brief Return the Base Priority value
*
* @param none
* @return uint32_t BasePriority
*
* Return the content of the base priority register
*********************************************************************************************************/
__ASM uint32_t __get_BASEPRI(void)
{
mrs r0, basepri
bx lr
}
/**********************************************************************************************************
* @brief Set the Base Priority value
*
* @param uint32_t BasePriority
* @return none
*
* Set the base priority register
*********************************************************************************************************/
__ASM void __set_BASEPRI(uint32_t basePri)
{
msr basepri, r0
bx lr
}
/**********************************************************************************************************
* @brief Return the Priority Mask value
*
* @param none
* @return uint32_t PriMask
*
* Return the state of the priority mask bit from the priority mask
* register
*********************************************************************************************************/
__ASM uint32_t __get_PRIMASK(void)
{
mrs r0, primask
bx lr
}
/**********************************************************************************************************
* @brief Set the Priority Mask value
*
* @param uint32_t PriMask
* @return none
*
* Set the priority mask bit in the priority mask register
*********************************************************************************************************/
__ASM void __set_PRIMASK(uint32_t priMask)
{
msr primask, r0
bx lr
}
/**
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SPI.rar_lpc历程
共96个文件
c:10个
h:10个
o:10个
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Cortex-M3_Execute_for_lpc1700 SPI历程,非常使用
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SPI.rar (96个子文件)
SPI
SPI_Master
SPI_Master.uvproj 29KB
USER_CODE
main.c 7KB
RAM.ini 2KB
LPC17xx
Startup
startup_LPC17xx.s 11KB
system_LPC17xx.h 2KB
LPC17xx.h 38KB
system_LPC17xx.c 23KB
CM3
core_cm3.c 28KB
core_cm3.h 63KB
SPI_Master.uvopt 150KB
SPI_NorFlash
SPI_NorFlash_uvopt.bak 21KB
SPI_NorFlash_DebugInRAM_TKScope.cfg 2KB
SPI_NorFlash_ReleasInFlash_TKScope.cfg 2KB
SPI_NorFlash_DebugInRAM_lpc17xx_iap_256_0.fop 2KB
SPI_NorFlash.uvproj 30KB
SPI_NorFlash_DebugInRAM LPC1766.ini 0B
SPI_NorFlash_ReleasInFlash_LPC1766_TKScope.cfg 2KB
USER_CODE
main.c 6KB
SPI_NorFlash_DebugInRAM Cortex M1.ini 0B
SPI_NorFlash_ReleasInFlash Cortex M1.ini 0B
SPI_NorFlash_ReleasInFlash_Cortex M1_TKScope.cfg 2KB
Out
DebugInRAM
LPC1700.axf 32KB
LPC1700.map 57KB
system_lpc17xx.d 524B
LPC1700.plg 300B
core_cm3.d 119B
startup_LPC17xx.o 6KB
main.crf 59KB
core_cm3.o 10KB
startup_LPC17xx.d 71B
LPC1700.tra 1KB
LPC1700.sct 479B
system_lpc17xx.o 53KB
system_lpc17xx.crf 60KB
mx25l1602drv.d 643B
mx25l1602drv.crf 63KB
LPC1700.lnp 444B
main.d 581B
mx25l1602drv.o 64KB
startup_LPC17xx.lst 35KB
LPC1700.htm 33KB
main.o 56KB
core_cm3.crf 3KB
ReleaseInFlash
LPC1700.hex 9KB
LPC1700.axf 32KB
LPC1700.map 57KB
system_lpc17xx.d 552B
LPC1700.plg 703B
core_cm3.d 127B
startup_LPC17xx.o 6KB
main.crf 59KB
core_cm3.o 10KB
startup_LPC17xx.d 75B
LPC1700.tra 1KB
LPC1700.sct 479B
system_lpc17xx.o 53KB
system_lpc17xx.crf 60KB
ExtDll.iex 19B
mx25l1602drv.d 675B
mx25l1602drv.crf 63KB
LPC1700.lnp 476B
main.d 613B
mx25l1602drv.o 64KB
startup_LPC17xx.lst 35KB
LPC1700.htm 33KB
main.o 56KB
core_cm3.crf 3KB
SPI_NorFlash_ReleasInFlash_lpc17xx_iap_256_0.fop 2KB
RAM.ini 2KB
SPI_NorFlash_uvproj.bak 30KB
LPC17xx
Startup
startup_LPC17xx.s 11KB
system_LPC17xx.h 2KB
LPC17xx.h 38KB
system_LPC17xx.c 23KB
SPI_NorFlash.uvgui.DANA 138KB
SPI_NorFlash.uvopt 21KB
SPI_NorFlash_DebugInRAM_LPC1766_TKScope.cfg 2KB
SPI_NorFlash_ReleasInFlash.dep 3KB
SPI_NorFlash_ReleasInFlash LPC1766.ini 0B
SPI_NorFlash_DebugInRAM.dep 3KB
CM3
core_cm3.c 28KB
core_cm3.h 63KB
SPI_NorFlash.uvgui_DANA.bak 138KB
SPI_NorFlash_DebugInRAM_Cortex M1_TKScope.cfg 2KB
MX25L1602Drv
MX25L1602Drv.h 5KB
MX25L1602Drv.c 17KB
SPI_Slave
USER_CODE
main.c 10KB
RAM.ini 2KB
LPC17xx
Startup
startup_LPC17xx.s 11KB
system_LPC17xx.h 2KB
LPC17xx.h 38KB
system_LPC17xx.c 23KB
SPI_Slave.uvproj 29KB
CM3
core_cm3.c 28KB
core_cm3.h 63KB
SPI_Slave.uvopt 151KB
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