/*
ALSA Soc Audio Layer - I2S core for newer Samsung SoCs.
*/
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <sound/soc.h>
#include <sound/pcm_params.h>
#include <mach/dma.h>
#include "regs-i2s-v2.h"
#include "s3c-i2s-v2.h"
#include "dma.h"
#undef S3C_IIS_V2_SUPPORTED
#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413) \
|| defined(CONFIG_ARCH_S3C64XX) || defined(CONFIG_CPU_S5PV210)
#define S3C_IIS_V2_SUPPORTED
#endif
#ifndef S3C_IIS_V2_SUPPORTED
#error Unsupported CPU model
#endif
#define S3C2412_I2S_DEBUG_CON 0
static inline struct s3c_i2sv2_info *to_info(struct snd_soc_dai *cpu_dai)
{
return snd_soc_dai_get_drvdata(cpu_dai);
}
#define bit_set(v, b) (((v) & (b)) ? 1 : 0)
#if S3C2412_I2S_DEBUG_CON
static void dbg_showcon(const char *fn, u32 con)
{
printk(KERN_DEBUG "%s: LRI=%d, TXFEMPT=%d, RXFEMPT=%d, TXFFULL=%d, RXFFULL=%d\n", fn,
bit_set(con, S3C2412_IISCON_LRINDEX),
bit_set(con, S3C2412_IISCON_TXFIFO_EMPTY),
bit_set(con, S3C2412_IISCON_RXFIFO_EMPTY),
bit_set(con, S3C2412_IISCON_TXFIFO_FULL),
bit_set(con, S3C2412_IISCON_RXFIFO_FULL));
printk(KERN_DEBUG "%s: PAUSE: TXDMA=%d, RXDMA=%d, TXCH=%d, RXCH=%d\n",
fn,
bit_set(con, S3C2412_IISCON_TXDMA_PAUSE),
bit_set(con, S3C2412_IISCON_RXDMA_PAUSE),
bit_set(con, S3C2412_IISCON_TXCH_PAUSE),
bit_set(con, S3C2412_IISCON_RXCH_PAUSE));
printk(KERN_DEBUG "%s: ACTIVE: TXDMA=%d, RXDMA=%d, IIS=%d\n", fn,
bit_set(con, S3C2412_IISCON_TXDMA_ACTIVE),
bit_set(con, S3C2412_IISCON_RXDMA_ACTIVE),
bit_set(con, S3C2412_IISCON_IIS_ACTIVE));
}
#else
static inline void dbg_showcon(const char *fn, u32 con)
{
}
#endif
/* Turn on or off the transmission path. */
static void s3c2412_snd_txctrl(struct s3c_i2sv2_info *i2s, int on)
{
void __iomem *regs = i2s->regs;
u32 fic, con, mod;
pr_debug("%s(%d)\n", __func__, on);
fic = readl(regs + S3C2412_IISFIC);
con = readl(regs + S3C2412_IISCON);
mod = readl(regs + S3C2412_IISMOD);
pr_debug("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic);
if (on) {
con |= S3C2412_IISCON_TXDMA_ACTIVE | S3C2412_IISCON_IIS_ACTIVE;
con &= ~S3C2412_IISCON_TXDMA_PAUSE;
con &= ~S3C2412_IISCON_TXCH_PAUSE;
switch (mod & S3C2412_IISMOD_MODE_MASK) {
case S3C2412_IISMOD_MODE_TXONLY:
case S3C2412_IISMOD_MODE_TXRX:
/* do nothing, we are in the right mode */
break;
case S3C2412_IISMOD_MODE_RXONLY:
mod &= ~S3C2412_IISMOD_MODE_MASK;
mod |= S3C2412_IISMOD_MODE_TXRX;
break;
default:
dev_err(i2s->dev, "TXEN: Invalid MODE %x in IISMOD\n",
mod & S3C2412_IISMOD_MODE_MASK);
break;
}
writel(con, regs + S3C2412_IISCON);
writel(mod, regs + S3C2412_IISMOD);
} else {
/* Note, we do not have any indication that the FIFO problems
* tha the S3C2410/2440 had apply here, so we should be able
* to disable the DMA and TX without resetting the FIFOS.
*/
con |= S3C2412_IISCON_TXDMA_PAUSE;
con |= S3C2412_IISCON_TXCH_PAUSE;
con &= ~S3C2412_IISCON_TXDMA_ACTIVE;
switch (mod & S3C2412_IISMOD_MODE_MASK) {
case S3C2412_IISMOD_MODE_TXRX:
mod &= ~S3C2412_IISMOD_MODE_MASK;
mod |= S3C2412_IISMOD_MODE_RXONLY;
break;
case S3C2412_IISMOD_MODE_TXONLY:
mod &= ~S3C2412_IISMOD_MODE_MASK;
con &= ~S3C2412_IISCON_IIS_ACTIVE;
break;
default:
dev_err(i2s->dev, "TXDIS: Invalid MODE %x in IISMOD\n",
mod & S3C2412_IISMOD_MODE_MASK);
break;
}
writel(mod, regs + S3C2412_IISMOD);
writel(con, regs + S3C2412_IISCON);
}
fic = readl(regs + S3C2412_IISFIC);
dbg_showcon(__func__, con);
pr_debug("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic);
}
static void s3c2412_snd_rxctrl(struct s3c_i2sv2_info *i2s, int on)
{
void __iomem *regs = i2s->regs;
u32 fic, con, mod;
pr_debug("%s(%d)\n", __func__, on);
fic = readl(regs + S3C2412_IISFIC);
con = readl(regs + S3C2412_IISCON);
mod = readl(regs + S3C2412_IISMOD);
pr_debug("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic);
if (on) {
con |= S3C2412_IISCON_RXDMA_ACTIVE | S3C2412_IISCON_IIS_ACTIVE;
con &= ~S3C2412_IISCON_RXDMA_PAUSE;
con &= ~S3C2412_IISCON_RXCH_PAUSE;
switch (mod & S3C2412_IISMOD_MODE_MASK) {
case S3C2412_IISMOD_MODE_TXRX:
case S3C2412_IISMOD_MODE_RXONLY:
/* do nothing, we are in the right mode */
break;
case S3C2412_IISMOD_MODE_TXONLY:
mod &= ~S3C2412_IISMOD_MODE_MASK;
mod |= S3C2412_IISMOD_MODE_TXRX;
break;
default:
dev_err(i2s->dev, "RXEN: Invalid MODE %x in IISMOD\n",
mod & S3C2412_IISMOD_MODE_MASK);
}
writel(mod, regs + S3C2412_IISMOD);
writel(con, regs + S3C2412_IISCON);
} else {
/* See txctrl notes on FIFOs. */
con &= ~S3C2412_IISCON_RXDMA_ACTIVE;
con |= S3C2412_IISCON_RXDMA_PAUSE;
con |= S3C2412_IISCON_RXCH_PAUSE;
switch (mod & S3C2412_IISMOD_MODE_MASK) {
case S3C2412_IISMOD_MODE_RXONLY:
con &= ~S3C2412_IISCON_IIS_ACTIVE;
mod &= ~S3C2412_IISMOD_MODE_MASK;
break;
case S3C2412_IISMOD_MODE_TXRX:
mod &= ~S3C2412_IISMOD_MODE_MASK;
mod |= S3C2412_IISMOD_MODE_TXONLY;
break;
default:
dev_err(i2s->dev, "RXDIS: Invalid MODE %x in IISMOD\n",
mod & S3C2412_IISMOD_MODE_MASK);
}
writel(con, regs + S3C2412_IISCON);
writel(mod, regs + S3C2412_IISMOD);
}
fic = readl(regs + S3C2412_IISFIC);
pr_debug("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic);
}
#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
/*
* Wait for the LR signal to allow synchronisation to the L/R clock
* from the codec. May only be needed for slave mode.
*/
static int s3c2412_snd_lrsync(struct s3c_i2sv2_info *i2s)
{
u32 iiscon;
unsigned long loops = msecs_to_loops(5);
pr_debug("Entered %s\n", __func__);
while (--loops) {
iiscon = readl(i2s->regs + S3C2412_IISCON);
if (iiscon & S3C2412_IISCON_LRINDEX)
break;
cpu_relax();
}
if (!loops) {
printk(KERN_ERR "%s: timeout\n", __func__);
return -ETIMEDOUT;
}
return 0;
}
/*
* Set S3C2412 I2S DAI format
*/
static int s3c2412_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
unsigned int fmt)
{
struct s3c_i2sv2_info *i2s = to_info(cpu_dai);
u32 iismod;
pr_debug("Entered %s\n", __func__);
iismod = readl(i2s->regs + S3C2412_IISMOD);
pr_debug("hw_params r: IISMOD: %x \n", iismod);
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
case SND_SOC_DAIFMT_CBM_CFM:
i2s->master = 0;
iismod |= S3C2412_IISMOD_SLAVE;
break;
case SND_SOC_DAIFMT_CBS_CFS:
i2s->master = 1;
iismod &= ~S3C2412_IISMOD_SLAVE;
break;
default:
pr_err("unknwon master/slave format\n");
return -EINVAL;
}
iismod &= ~S3C2412_IISMOD_SDF_MASK;
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_RIGHT_J:
iismod |= S3C2412_IISMOD_LR_RLOW;
iismod |= S3C2412_IISMOD_SDF_MSB;
break;
case SND_SOC_DAIFMT_LEFT_J:
iismod |= S3C2412_IISMOD_LR_RLOW;
iismod |= S3C2412_IISMOD_SDF_LSB;
break;
case SND_SOC_DAIFMT_I2S:
iismod &= ~S3C2412_IISMOD_LR_RLOW;
iismod |= S3C2412_IISMOD_SDF_IIS;
break;
default:
pr_err("Unknown data format\n");
return -EINVAL;
}
writel(iismod, i2s->regs + S3C2412_IISMOD);
pr_debug("hw_params w: IISMOD: %x \n", iismod);
return 0;
}
static int s3c_i2sv2_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
{
struct s3c_i2sv2_info *i2s = to_info(dai);
struct s3c_dma_params *dma_data;
u32 iismod;
pr_debug("Entered %s\n", __func__);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
dma_data = i2s->dma_playback;
else
dma_data = i2s->dma_capture;
snd_soc_dai_set_dma_data(dai, substream, dma_data);
/* Working copies of register */
iismod = readl(i2s->regs + S3C2412_IISMOD);
pr_debug("%s: r: IISMOD: %x\n", __func__, iismod);
iismod &= ~S3C64XX_IISMOD_BLC_MASK;
/* Sample size */
switch (params_format(params)) {
case SNDRV_PCM_FORMAT_S8:
iismod |= S3C64XX_IISMOD_BLC_8BIT;
break;
case SNDRV_PCM_