NO-INT-SPI.rar_FM3_SPI CSIO_m3 int_富士通

/*! ****************************************************************************** ** ** \file I2C_fm3.c ** ** \brief I2C drivers ** ** \author FSLA AE Team ** ** \version V0.10 ** ** \date 2012-02-09 ** ** \attention THIS SAMPLE CODE IS PROVIDED AS IS. FUJITSU SEMICONDUCTOR ** ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR ** OMMISSIONS. ** ** (C) Copyright 200x-201x by Fujitsu Semiconductor(Shanghai) Co.,Ltd. ** ****************************************************************************** ** ** \note Other information. ** ****************************************************************************** */ /*---------------------------------------------------------------------------*/ /* include files */ /*---------------------------------------------------------------------------*/ #include "I2C_fm3.h" /*---------------------------------------------------------------------------*/ /* Bit definition */ /*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/ /* local datatypes */ /*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/ /* local data */ /*---------------------------------------------------------------------------*/ static FM3_MFS03_I2C_TypeDef* pMFS_I2C_REG_07[8] = { (FM3_MFS03_I2C_TypeDef*)(FM3_MFS0_I2C), (FM3_MFS03_I2C_TypeDef*)(FM3_MFS1_I2C), (FM3_MFS03_I2C_TypeDef*)(FM3_MFS2_I2C), (FM3_MFS03_I2C_TypeDef*)(FM3_MFS3_I2C), (FM3_MFS03_I2C_TypeDef*)(FM3_MFS4_I2C), (FM3_MFS03_I2C_TypeDef*)(FM3_MFS5_I2C), (FM3_MFS03_I2C_TypeDef*)(FM3_MFS6_I2C), (FM3_MFS03_I2C_TypeDef*)(FM3_MFS7_I2C), }; static FM3_MFS47_I2C_TypeDef* pMFS_I2C_REG_47[8] = { (FM3_MFS47_I2C_TypeDef*)(0), (FM3_MFS47_I2C_TypeDef*)(0), (FM3_MFS47_I2C_TypeDef*)(0), (FM3_MFS47_I2C_TypeDef*)(0), (FM3_MFS47_I2C_TypeDef*)(FM3_MFS4_I2C), (FM3_MFS47_I2C_TypeDef*)(FM3_MFS5_I2C), (FM3_MFS47_I2C_TypeDef*)(FM3_MFS6_I2C), (FM3_MFS47_I2C_TypeDef*)(FM3_MFS7_I2C), }; /*---------------------------------------------------------------------------*/ /* local functions prototypes */ /*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/ /* global data */ /*---------------------------------------------------------------------------*/ extern MFS_CallbackT g_pMFSIRQCallback[16]; /*---------------------------------------------------------------------------*/ /* global functions */ /*---------------------------------------------------------------------------*/ /*! ****************************************************************************** ** \brief Config the I2C baud rate ** ** \param Ch Requested channel ** \arg MFS_Ch0-MFS_Ch7 ** ** \param baudrate ** \param unsigned int ** \arg Baud rate value ** ** \retval None ** ****************************************************************************** */ uint16_t MFS_I2CConfigBaudrate(uint8_t Ch, uint32_t baudrate) { uint16_t tBGR; uint32_t tSysFrePCLK2; /* Check Cfg parameter */ ASSERT(Ch <= I2C_Ch_MAX); tSysFrePCLK2 = SystemCoreClock/(1<<((FM3_CRG->APBC2_PSR&0x03))); //8div tBGR = (uint16_t)(((tSysFrePCLK2 + (baudrate / 2)) / (uint32_t)baudrate) - 1); return tBGR; } /*! ****************************************************************************** ** \brief Config the I2C mode ** ** \param Ch Requested channel ** \arg MFS_Ch0-MFS_Ch7 ** ** \param Mode initialization data ** \arg Mode info ** ** \return None ** ****************************************************************************** */ void MFS_I2CConfigMode(uint8_t Ch, MFS_I2CModeConfigT *pModeConfig) { uint8_t tIBCR = 0; uint8_t tSMR = 0; uint8_t tSSR = 0; uint8_t tISBA = 0; uint16_t tBGR = 0; /* Check Cfg parameter */ ASSERT(Ch <= I2C_Ch_MAX); ASSERT(pModeConfig->MasterSalve <= I2C_MASTER); ASSERT(pModeConfig->DMAMode <= I2C_DMA_EN); /* Config the MOD as I2C */ tSMR = (tSMR & 0x1F) | MFS_MODE_I2C; /*config the DMA mode */ if(pModeConfig->DMAMode == I2C_DMA_EN) { tSSR = tSSR | I2C_SSR_DMA; } else { tSSR = tSSR & (~I2C_SSR_DMA); } /*Config ACK enable*/ tIBCR |= I2C_IBCR_ACKE; /* Config Slave mode*/ if(pModeConfig->MasterSalve == I2C_SLAVE) { tIBCR |= (I2C_IBCR_CNDE | I2C_IBCR_INTE); tISBA |= pModeConfig->SlaveAddr; tISBA |= I2C_SAEN_BIT; } /* config Band Rate*/ tBGR = MFS_I2CConfigBaudrate(Ch,pModeConfig->Baudrate); /* config OK*/ pMFS_I2C_REG_07[Ch]->SMR = tSMR; pMFS_I2C_REG_07[Ch]->ISMK = 0; //I2C disable befre other registers were set pMFS_I2C_REG_07[Ch]->BGR = tBGR; pMFS_I2C_REG_07[Ch]->IBCR = tIBCR; pMFS_I2C_REG_07[Ch]->ISBA = tISBA; pMFS_I2C_REG_07[Ch]->SSR = tSSR; pMFS_I2C_REG_07[Ch]->ISMK |= (I2C_BUS_EN_BIT | 0x7F); //enable I2C bus return; } /*! ****************************************************************************** ** \brief Config the I2C ISR call back ** ** \param Ch Requested channel ** \arg MFS_Ch0-MFS_Ch7 ** ** \param Mode initialization data ** \param MFS_I2CISRCallbackT ** \arg Mode info ** ** \retval None ** ****************************************************************************** */ void MFS_I2CConfigISRCallback(uint8_t Ch, MFS_I2CISRCallbackT *pCallback) { /* Check Cfg parameter */ ASSERT(Ch <= I2C_Ch_MAX); ASSERT((pCallback->pISRRXCallback != NULL) && (pCallback->pISRTXCallback != NULL)); /* Init the callback */ g_pMFSIRQCallback[Ch*2] = pCallback->pISRRXCallback; g_pMFSIRQCallback[Ch*2+1] = pCallback->pISRTXCallback; return; } /*! ****************************************************************************** ** \brief Config the I2C FIFO ** ** \param Ch Requested channel ** \arg MFS_Ch0-MFS_Ch7 ** ** \param FIFO initialization data ** \arg FIFO config info ** ** \return None ** ****************************************************************************** */ void MFS_I2CConfigFIFO(uint8_t Ch, MFS_I2CFIFOConfigT *pFIFOConfig) { uint8_t tFCR1 = 0; uint8_t tFCR0 = 0; /* Check Cfg parameter */ ASSERT((Ch <= I2C_Ch_MAX) && (Ch >= I2C_Ch_FIFOMIN)); if(pFIFOConfig->FIFOSel == I2C_FIFO1_TX) { tFCR1 = tFCR1 & (~I2C_FCR1_FSEL); } else { tFCR1 = tFCR1 | I2C_FCR1_FSEL; } /* reset FIFO1 and FIFO2*/ tFCR0 = tFCR0 | I2C_FCR0_FCL2 | I2C_FCR0_FCL1 ; pMFS_I2C_REG_47[Ch]->FCR1 = tFCR1; pMFS_I2C_REG_47[Ch]->FCR0 = tFCR0 | I2C_FCR0_FE1 | I2C_FCR0_FE2; MFS_I2CEnFIFO1(Ch,pFIFOConfig->Bytecount1); MFS_I2CEnFIFO2(Ch,pFIFOConfig->Bytecount2); return; } /*! ****************************************************************************** ** \brief select mater mode or slave mode. ** ** \param Ch Requested channel ** \arg MFS_Ch0-MFS_Ch7 ** ** \param En -- TRUE-> Master mode FALSE->Slave mode ** \arg