Confidential Proprietary of Samsung Electronics Co., Ltd
Copyright © 2008 Samsung Electronics, Inc. All Rights Reserved
Circuit Design Guide
S3C6410X
RISC Microprocessor
July 18, 2008
REV 1.00
S3C6410_CIRCUIT DESIGN GUIDE REV 1.00
Important Notice
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S3C6410X RISC Microprocessor
Circuit Design Guide, Revision 1.00
Copyright © 2008-2008 Samsung Electronics Co.,Ltd.
All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted in
any form or by any means, electric or mechanical, by photocopying, recording, or otherwise, without the prior
written consent of Samsung Electronics Co.,Ltd.
Samsung Electronics Co., Ltd.
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Printed in the Republic of Korea
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S3C6410_CIRCUIT DESIGN GUIDE REV 1.00
Revision History
Revision No Description of Change Refer to Author(s) Date
0.00 - Initial Release for review - W.J.JANG June 2, 2008
1.00 - Public Release - H.M.NOH July 18, 2008
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S3C6410_CIRCUIT DESIGN GUIDE REV 1.00
Table of Contents
1. Overview.................................................................................................................................................... 6
1.1 S3C6410 Pin Description ............................................................................................................... 6
1.2 Pin Power Domain.......................................................................................................................... 14
1.3 Booting Option ................................................................................................................................15
1.4 Feature of the IROM Boot mode .................................................................................................... 16
1.5 Recommend Operating Conditions ................................................................................................ 17
1.6 Difference of S3C6410 and S3C6400 ............................................................................................ 18
2. MEMORY MAP ......................................................................................................................................... 20
2.1 Maximum Address range of the Memory Port0.............................................................................. 20
2.2 Maximum Address range of the Memory Port1.............................................................................. 20
3. Syscon....................................................................................................................................................... 21
3.1 Power.............................................................................................................................................. 21
3.1.1 Power On Sequence ................................................................................................................... 21
3.1.2 Power Off Sequence ................................................................................................................... 24
3.1.3 Power Scheme Diagram.............................................................................................................. 25
3.1.4 Circuit Guide for DVS Scheme.................................................................................................... 26
3.2 Clock............................................................................................................................................... 27
3.2.1 PLL .............................................................................................................................................. 27
3.3 Reset .............................................................................................................................................. 29
3.3.1 HardWare Reset.......................................................................................................................... 29
4. MEMORY SUBSYSTEM ........................................................................................................................... 30
5. DRAM Controller ....................................................................................................................................... 31
5.1 Memory Port0 ................................................................................................................................. 31
5.2 Memory Port1 ................................................................................................................................. 31
5.3 DRAM Initialize Sequence.............................................................................................................. 33
5.4 PCB LAYOUT GUIDELINES FOR DDR ........................................................................................ 36
6. SROM Controller ....................................................................................................................................... 39
6.1 Address Connection ....................................................................................................................... 39
6.2 SRAM/ROM Interface Examples .................................................................................................... 39
7. OneNAND Controller................................................................................................................................. 41
7.1 Overview......................................................................................................................................... 41
7.2 Signal Description........................................................................................................................... 41
7.3 Circuit Diagram Example................................................................................................................ 41
7.4 Caution .......................................................................................................................................... 42
8. NAND Flash .............................................................................................................................................. 43
8.1 Interface for Multi Chip Select NAND ............................................................................................. 43
9. CF Controller ............................................................................................................................................. 44
9.1 CF Interface .................................................................................................................................... 44
9.2 Cautions.......................................................................................................................................... 45
9.3 ATA 2 Slot operation guide............................................................................................................. 46
10. GPIO........................................................................................................................................................ 48
11. DMA Controller........................................................................................................................................ 54
12. VECTORED INTERRUPT CONTROLLER............................................................................................. 55
13. SECURITY SUB-SYSTEM...................................................................................................................... 56
14. DISPLAY CONTROLLER ....................................................................................................................... 57
15. POST PROCESSOR............................................................................................................................... 61
16. TV SCALER ............................................................................................................................................ 62
17. TV ENCODER......................................................................................................................................... 63
18. GRAPHICS 2D ........................................................................................................................................ 65
19. IMAGE ROTATOR .................................................................................................................................. 66
20. CAMERA INTERFACE............................................................................................................................ 67
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S3C6410_CIRCUIT DESIGN GUIDE REV 1.00
20.1 CAMIF INPUT............................................................................................................................... 67
20.2 Signal Description......................................................................................................................... 67
21. MULTI-FORMAT VIDEO CODEC........................................................................................................... 69
22. JPEG CODEC ......................................................................................................................................... 70
23. MODEM INTERFACE ............................................................................................................................. 71
23.1 Pin Description ............................................................................................................................. 71
23.2 Pin Connection Example .............................................................................................................. 72
23.3 Caution ......................................................................................................................................... 72
24. HOST INTERFACE ................................................................................................................................. 73
25. USB Host................................................................................................................................................. 74
25.1 Power Domain .............................................................................................................................. 74
25.2 Circuit Diagram Example.............................................................................................................. 74
25.3 USB Host connection ................................................................................................................... 74
25.4 Caution ......................................................................................................................................... 74
26. USB 2.0 HS OTG .................................................................................................................................... 75
26.1 Power Domain .............................................................................................................................. 75
26.2 Circuit Diagram Example.............................................................................................................. 75
26.3 USB PLL Specification ................................................................................................................. 77
26.4 USB SIGNAL ROUTING .............................................................................................................. 77
27. SD/MMC HOST CONTROLLER ............................................................................................................. 79
28. MIPI HSI INTERFACE CONTROLLER................................................................................................... 82
29. SPI........................................................................................................................................................... 83
30. IIC-BUS INTERFACE.............................................................................................................................. 84
30.1 Pin Description ............................................................................................................................. 84
30.2 Equation of the pull-up resistor value ........................................................................................... 84
31. UART....................................................................................................................................................... 85
32. PWM TIMER ........................................................................................................................................... 86
33. RTC ......................................................................................................................................................... 87
34. WATCHDOG TIMER............................................................................................................................... 88
35. AC97 CONTROLLER.............................................................................................................................. 89
35.1 AC97 Signal Description............................................................................................................... 89
35.2 Audio Ports ................................................................................................................................... 89
35.3 Signal Description......................................................................................................................... 89
36. IIS BUS CONTROLLER .......................................................................................................................... 90
36.1 Signal Description......................................................................................................................... 90
36.2 Audio Port ..................................................................................................................................... 90
36.3 External Clock Source .................................................................................................................. 90
36.4 Connection Example .................................................................................................................... 90
37. PCM BUS CONTROLLER ...................................................................................................................... 92
37.1 Signal Description......................................................................................................................... 92
37.2. Audio Port .................................................................................................................................... 92
37.3 External Clock Source .................................................................................................................. 92
37.4 Connection Example .................................................................................................................... 93
38. IRDA CONTROLLER .............................................................................................................................. 94
39. ADC&TOUCH SCREEN INTERFACE.................................................................................................... 95
40. KEYPAD INTERFACE ............................................................................................................................ 96
41. IIS MULTI AUDIO INTERFACE .............................................................................................................. 97
41.1 Signal Description......................................................................................................................... 97
41.2 Audio Ports ................................................................................................................................... 97
41.3 External Clock Source .................................................................................................................. 98
41.4 Connection Example .................................................................................................................... 98
42. GRAPHIC 3D .......................................................................................................................................... 99
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