I2C.rar_I2C Verilog 仿真_I2C proteus

#include"reg51.h" #include"intrins.h" #define uc unsigned char #define uint unsigned int uc counter=30; sbit SCL=P2^6; sbit SDA=P2^7; bit high=1; bit low=0; void start(); void stop(); void delay(); void ack(); void noack(); void send8dibt(); void sendwhole(uc add,uc num); read8bit(); checksda(); void delay() {_nop_(); _nop_(); _nop_(); _nop_(); _nop_(); } void delay1(uint a) { uc k,b; for(b=0;b<a;b++) { for(k=300;k>0;k--); } } void start() { SDA=high; SCL=high; delay(); SDA=low; delay(); SCL=low; } void stop() //时钟线保持高电平期间，数据线电平从低到高的跳变作为总线的停止信号 { SDA=low; //必需先写SDA为low,否则stop程序段不能正确被总线识别 SCL=high; delay(); SDA=high; delay(); SCL=low; } void ack() { SDA=high; SCL=high; if(SDA==0) { P0=0X00; } delay(); SCL=low; } void send8bit(uc dat) { char i,temp; for(i=0;i<8;i++) { temp=dat&0x80; SDA=temp; SCL=high; delay(); SCL=low; dat=dat<<1; } } void sendwhole(uc add,uc num) { start(); send8bit(0xa0); ack(); send8bit(add); ack(); send8bit(num); noack(); stop(); } checksda(void) { uc temp2; SCL=low; //delay(); temp2=SDA; //delay(); SCL=high; //delay(); SCL=low; return(temp2); } read8bit() { uc temp1=0,c; SDA=high; for(c=0;c<8;c++) { if(checksda()) temp1=temp1|0x80; else temp1=temp1&0x7f; delay(); temp1=temp1>>1; } delay1(10); return(temp1); } void noack() { SDA=1; SCL=1; delay(); SCL=0; delay(); } readwhole(uc add1) { uc temp3; start(); send8bit(0xa0); ack(); send8bit(add1); ack(); start(); send8bit(0xa1); ack(); temp3=read8bit(); ack(); stop(); delay1(10); return(temp3); } main() { uint i,d; for(i=0;i<=0xff;i++)//写操作 { sendwhole(i,i); delay1(10); } for(d=0;d<=0xff;d++)//读操作 { P1=readwhole(d); delay1(10); } readwhole(0x78); while(1); }