sram.rar_DDR doc_SDRAM控制器_SRAM_SRAM VHDL

File/Directory Description ============================================================================= \doc DDR SDRAM reference design documentation \model Contains the vhdl SDRAM model \route Contains the Quartus 2000.05 project files a routed controller design \simulation Contains the vhdl testbench, modelsim project file, and library \source Contains the vhdl source files for the DDR SDRAM reference design \synthesis\synplicity Contains all synplicity project files associated with synthesizing the reference design Version History =============== v1.0 First release v1.0.1 Updates to csf/esf/psf constraint files in \route to correct pin conflict on U3.