Advanced Micro Devices
AMD A50M Fusion
Controller Hub Databook
Publication #
47776
Revision:
3.00
Issue Date:
June 2012
47776 Rev. 3.00 June 2012
AMD A50M Fusion Controller Hub Databook
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Contents
Chapter 1 Introduction ............................................................................................................ 12
1.1 Features of the Hudson-M1 Fusion Controller Hub (FCH) ............................................. 12
1.2 Part Numbers and Brandings ........................................................................................... 15
1.3 Hudson-M1 FCH Block Diagram .................................................................................... 17
1.4 Conventions and Notations .............................................................................................. 18
1.4.1 Pin Names ................................................................................................................ 18
1.4.2 Pin Types ................................................................................................................. 18
1.4.3 Numeric Representation........................................................................................... 18
1.4.4 Register Field ........................................................................................................... 19
1.4.5 Acronyms and Abbreviations .................................................................................. 19
Chapter 2 Functional Description .......................................................................................... 21
2.1 EHCI USB 2.0 and OHCI USB 1.1 Controllers .............................................................. 21
2.1.1 USB Power Management ......................................................................................... 23
2.2 SMI/SCI Generation ........................................................................................................ 25
2.2.1 Event Sources for SCI .............................................................................................. 25
2.2.2 SMI Events............................................................................................................... 26
2.2.3 SMI/SCI Work Flow ................................................................................................ 26
2.3 LPC ISA Bridge ............................................................................................................... 28
2.3.1 LPC Interface Overview .......................................................................................... 28
2.3.2 LPC Module Block Diagram ................................................................................... 30
2.4 Real Time Clock .............................................................................................................. 30
2.4.1 Functional Blocks of RTC ....................................................................................... 30
2.5 Serial ATA Controller ..................................................................................................... 31
2.6 High Definition Audio ..................................................................................................... 32
2.6.1 HD Audio Codec Connections................................................................................. 33
2.7 Clock Generation ............................................................................................................. 33
2.8 Power Management/ACPI ............................................................................................... 34
Chapter 3 Ballout Assignment ................................................................................................ 35
Chapter 4 Pin Descriptions ..................................................................................................... 37
4.1 APU Interface Pin Descriptions ....................................................................................... 37
4.2 LPC Interface Pin Descriptions ....................................................................................... 37
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4.3 Unified Media Interface (UMI) Pin Descriptions ............................................................ 38
4.4 General Purpose PCI Express
®
Ports Interface ................................................................ 39
4.5 USB Interface .................................................................................................................. 39
4.6 Serial ATA Interface ........................................................................................................ 40
4.7 HD Audio Interface ......................................................................................................... 42
4.8 Real Time Clock Interface ............................................................................................... 42
4.9 Hardware Monitor Interface ............................................................................................ 42
4.10 SPI ROM Interface .......................................................................................................... 43
4.11 Power Management Interface .......................................................................................... 44
4.12 SMBus Interface .............................................................................................................. 47
4.13 Reset / Clocks / ATE / JTAG........................................................................................... 48
4.14 General Purpose I/O and General Event .......................................................................... 53
4.15 Infrared Interface ............................................................................................................. 63
4.16 Power and Ground ........................................................................................................... 64
4.17 Miscellaneous Pins .......................................................................................................... 66
4.18 Unsupported Interfaces/Signals ....................................................................................... 67
4.19 Integrated Resistors .......................................................................................................... 67
4.20 Strap Information ............................................................................................................. 68
Chapter 5 Power Sequence and Timing ................................................................................. 72
5.1 Power Sequence ............................................................................................................... 72
5.2 Reset Timing .................................................................................................................... 77
5.2.1 ROMRST# ............................................................................................................... 77
5.2.2 System Reset ............................................................................................................ 78
5.2.3 PCIe Reset ................................................................................................................ 79
5.3 ACPI Timing .................................................................................................................... 81
5.3.1 S-State Timing ......................................................................................................... 81
5.3.2 S4 and S5 Timing..................................................................................................... 83
5.3.3 C-State Timing ......................................................................................................... 84
5.3.4 VID/FID Change Timing ......................................................................................... 85
5.3.5 Timing Definitions and Descriptions ....................................................................... 85
5.3.6 Registers for S-State and C-State Timing ................................................................ 88
5.4 Power Button Timing ....................................................................................................... 90
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Chapter 6 Electrical Characteristics ...................................................................................... 91
6.1 Absolute Maximum Ratings ............................................................................................ 91
6.2 Functional Operating Range ............................................................................................ 91
6.3 DC Characteristics ........................................................................................................... 91
6.4 RTC Battery Current Consumption ................................................................................. 93
6.5 States of Power Rails during ACPI S1 to S5 States ........................................................ 93
6.6 System Clock Specifications ........................................................................................... 94
6.6.1 System Clock Descriptions ...................................................................................... 94
6.6.2 System Clock Input Frequency Specifications ........................................................ 95
6.6.3 System Clock Output AC and DC Specifications.................................................... 95
Chapter 7 Package Information ............................................................................................. 98
7.1 Physical Dimensions ........................................................................................................ 98
7.2 Pressure Specification ...................................................................................................... 99
7.3 Thermal Information ........................................................................................................ 99
7.4 Reflow Profile ................................................................................................................ 101
Chapter 8 Testability ............................................................................................................. 103
8.1 Test Control Signals ....................................................................................................... 103
8.2 XOR Chain Test Mode .................................................................................................. 105
8.2.1 Brief Description of an XOR Chain....................................................................... 105
8.2.2 Description of the Hudson-M1 XOR Chain .......................................................... 107
Appendix A. Pin Listing ............................................................................................................. 113
Appendix B. Unsupported Interfaces/Signals .......................................................................... 130
