<?xml version="1.0" ?>
<LOG_ROOT>
<PROJECT NAME="Block1">
</PROJECT>
</LOG_ROOT>
weitongbu.rar_block图_vhdl block图_位同步_位同步 Verilog_锁相 同步
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2022-09-22
19:41:44
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weitongbu.rar （82个子文件） 
weitongbu 
Block1.fit.summary 480B Block1.qpf 905B Block1_assignment_defaults.qdf 37KB Block2.bdf 6KB Block1.sim.rpt 10KB Block1.done 26B yiweijicun.bsf 2KB Block1.sof 419KB db prev_cmp_Block1.fit.qmsg 20KB Block1.fit.qmsg 20KB Block1.cmp.rdb 17KB Block1.sim.cvwf 860B Block1.cmp.tdb 2KB Block1.sgdiff.hdb 6KB Block1.sim.rdb 2KB Block1.sim.hdb 3KB Block1.rtlv.hdb 6KB Block1.pre_map.hdb 6KB Block1.tan.qmsg 29KB Block1.db_info 137B Block1.sld_design_entry.sci 154B Block1.(0).cnf.cdb 961B Block1.asm.qmsg 2KB Block1.tis_db_list.ddb 174B Block1.syn_hier_info 0B prev_cmp_Block1.sim.qmsg 3KB Block1.map.cdb 1KB wed.wsf 4KB Block1.cmp.logdb 4B Block1.map.hdb 6KB Block1.pre_map.cdb 948B Block1.eco.cdb 161B prev_cmp_Block1.asm.qmsg 2KB prev_cmp_Block1.tan.qmsg 29KB Block1.signalprobe.cdb 901B Block1.sim.qmsg 3KB oneMHZ.eco.cdb 161B prev_cmp_Block1.map.qmsg 5KB oneMHZ.map.qmsg 2KB oneMHZ.db_info 137B Block1.map.logdb 4B Block1.cmp.cdb 2KB Block1.rtlv_sg_swap.cdb 178B Block1.cmp.hdb 6KB Block1.cmp0.ddb 38KB Block1.hier_info 277B Block1.eds_overflow 3B Block1.rtlv_sg.cdb 860B Block1.hif 551B prev_cmp_Block1.qmsg 3KB oneMHZ.sld_design_entry.sci 154B Block1.map.qmsg 5KB Block1.sld_design_entry_dsc.sci 154B Block1.sgdiff.cdb 848B Block1.cbx.xml 88B Block1.(0).cnf.hdb 578B Block1.tmw_info 195B oneMHZ.vhd 487B Block1.qsf 2KB oneMHZ.qws 90B weifenqi.bsf 2KB Block1.pof 512KB Block1.map.eqn 2KB Block1.flow.rpt 5KB Block1.tan.summary 1KB oneMHZ.bsf 2KB wave2.vwf 3KB Block1.map.summary 358B Block1.tan.rpt 17KB oneMHZ.qpf 910B Block1.fit.rpt 122KB Block1.map.rpt 17KB oneMHZ.done 26B wave1.vwf 3KB Block3.bdf 23KB Block1.asm.rpt 7KB Block1.pin 57KB Block1.fit.eqn 3KB Block1.qws 676B oneMHZ.qsf 2KB Block1.bdf 22KB Block1.fit.smsg 629B资源评论
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