mcasp.rar_mcasp

/* * Copyright (C) 2003 Texas Instruments Incorporated * All Rights Reserved */ /* *---------peripheral_mcasp1.h--------- * Contains functions that initialise EDMA and McASP */ #include "mcasp1.h" /************************************************************************\ name: SetupEdma() purpose: Setup EDMA and enable channels to service MCASP This function opens the EDMA handle but does not close it. inputs: int port: McASP port being serviced returns: n/a \************************************************************************/ void SetupEdma(int port) { int edmaChaAXEVT; int edmaChaAREVT; /* Program ESEL registers to select EDMA channels used to service McASP */ if (port == 0) /* McASP0 */ { edmaChaAXEVT = EDMA_map(EDMA_CHA_AXEVT0, 12); edmaChaAREVT = EDMA_map(EDMA_CHA_AREVT0, 13); } else if (port == 1) /* McASP1 */ { edmaChaAXEVT = EDMA_map(EDMA_CHA_AXEVT1, 14); edmaChaAREVT = EDMA_map(EDMA_CHA_AREVT1, 15); } /* Open EDMA handles */ hEdmaAXEVT = EDMA_open(edmaChaAXEVT, EDMA_OPEN_RESET); hEdmaAREVT = EDMA_open(edmaChaAREVT, EDMA_OPEN_RESET); hEdmaNull = EDMA_allocTable(-1); /* Configure EDMA parameters */ /* Transmit parameters. See function SetupSrcLocation for details on data structure */ EDMA_configArgs( hEdmaAXEVT, EDMA_OPT_RMK( EDMA_OPT_PRI_HIGH, EDMA_OPT_ESIZE_32BIT, /* Element size 32 bits */ EDMA_OPT_2DS_NO, EDMA_OPT_SUM_IDX, EDMA_OPT_2DD_NO, EDMA_OPT_DUM_NONE, EDMA_OPT_TCINT_YES, /* Enable Transfer Complete Interrupt */ EDMA_OPT_TCC_OF(edmaChaAXEVT), EDMA_OPT_LINK_YES, /* Enable linking to NULL table */ EDMA_OPT_FS_YES ), EDMA_SRC_RMK((Uint32)srcData), EDMA_CNT_RMK(TOTAL_XMT_DATA-1, NUM_XMT_SERIALIZER), /* no. of elements */ EDMA_DST_RMK(MCASP_getXbufAddr(hMcasp)), /* for frame index calculation, see function SetupSrcLocations description */ EDMA_IDX_RMK(EDMA_IDX_FRMIDX_OF(2*NUM_XMT_SERIALIZER*4), EDMA_IDX_ELEIDX_OF(4)), EDMA_RLD_RMK(NUM_XMT_SERIALIZER,0) ); EDMA_configArgs( hEdmaAREVT, EDMA_OPT_RMK( EDMA_OPT_PRI_HIGH, EDMA_OPT_ESIZE_32BIT, /* Element size 32 bits */ EDMA_OPT_2DS_NO, EDMA_OPT_SUM_NONE, EDMA_OPT_2DD_NO, EDMA_OPT_DUM_INC, EDMA_OPT_TCINT_YES, /* Enable Transfer Complete Interrupt */ EDMA_OPT_TCC_OF(edmaChaAREVT), EDMA_OPT_LINK_YES, /* Enable linking to NULL table */ EDMA_OPT_FS_YES ), EDMA_SRC_RMK(MCASP_getRbufAddr(hMcasp)), EDMA_CNT_RMK(TOTAL_RCV_DATA-1, NUM_RCV_SERIALIZER), /* no. of elements */ EDMA_DST_RMK((Uint32)dstData), EDMA_IDX_RMK(EDMA_IDX_FRMIDX_DEFAULT, EDMA_IDX_ELEIDX_DEFAULT), EDMA_RLD_RMK(NUM_XMT_SERIALIZER,0) ); /* Link transfers to Null */ EDMA_link(hEdmaAXEVT, hEdmaNull); EDMA_link(hEdmaAREVT, hEdmaNull); EDMA_intHook(12, setXmtDone1); EDMA_intHook(13, setRcvDone1); EDMA_intHook(14, setXmtDone2); EDMA_intHook(15, setRcvDone2); /* Enable EDMA interrupts */ EDMA_intDisable(edmaChaAXEVT); EDMA_intDisable(edmaChaAREVT); EDMA_intClear(edmaChaAXEVT); EDMA_intClear(edmaChaAREVT); EDMA_intEnable(edmaChaAXEVT); EDMA_intEnable(edmaChaAREVT); /* enable EDMA channels */ EDMA_enableChannel(hEdmaAXEVT); EDMA_enableChannel(hEdmaAREVT); } /************************************************************************\ name: InitMcasp purpose: Initialize MCASP in these steps: 1. Open handle and reset MCASP to default values (done before entering this function) 2. Configure all registers except GBLCTL 2a. PWRDEMU 2b. Receiver registers RMASK, RFMT, AFSRCTL, ACLKRCTL, AHCLKRCTL, RTDM, RINTCTL, RCLKCHK Be sure all clocks are set to use internal clock source if external serial clocks are not running. This is for proper synchronization of the GBLCTL register. 2c. Transmitter registers XMASK, XFMT, AFSXCTL, ACLKXCTL, AHCLKXCTL, XTDM, XINTCTL, XCLKCHK Be sure all clocks are set to use internal clock source if external serial clocks are not running. This is for proper synchronization of the GBLCTL register. 2d. Serializer registers 2e. PFUNC, PDIR, DITCTL, DLBCTL, AMUTE. Note that PDIR should only be programmed AFTER the clocks/frames are setup in the steps above. Because the moment you configure a clk pin as an output in PDIR, the clock pin starts toggling. Therefore you want to make sure step 2b is completed first so that the clocks toggle at the proper rate. 3. Start serial clocks NOTE THAT this step can be skipped if external serial clocks are used and they are RUNNING. 3a. Take internal serial clk dividers out of reset by setting bits RCLKRST, RHCLKRST, XCLKRST, and XHCLKRST in GBLCTL. All other bits in the GBLCTL register should be held at 0. 3b. Read back from GBLCTL register to ensure step 3a is completed errorfully. NOTE: Prior to any GBLCTL register writing, presence of the rx and tx clock is a must. NOTE THAT THIS FUNCTION DOES NOT CLOSE THE MCASP CSL MODULE! inputs: int port : McASP port # returns: n/a \************************************************************************/ void InitMcasp(int port) { MCASP_SetupClk clkSetup; MCASP_SetupHclk hClkSetup; MCASP_SetupFsync fsyncSetup; MCASP_SetupFormat formatSetup; /*---------------------------------------------------------------*/ /* Define structures for later use */ /*---------------------------------------------------------------*/ MCASP_ConfigRcv rcvRegs = { 0x000FFFFF, MCASP_RFMT_RMK( MCASP_RFMT_RDATDLY_0BIT, MCASP_RFMT_RRVRS_LSBFIRST, MCASP_RFMT_RPAD_RPBIT, MCASP_RFMT_RPBIT_OF(19), MCASP_RFMT_RSSZ_32BITS, MCASP_RFMT_RBUSEL_DAT, MCASP_RFMT_RROT_12BITS), MCASP_AFSRCTL_RMK( MCASP_AFSRCTL_RMOD_OF(NUM_TDM_SLOT), MCASP_AFSRCTL_FRWID_BIT, MCASP_AFSRCTL_FSRM_INTERNAL, MCASP_AFSRCTL_FSRP_ACTIVEHIGH), MCASP_ACLKRCTL_RMK( MCASP_ACLKRCTL_CLKRP_FALLING, MCASP_ACLKRCTL_CLKRM_INTERNAL, MCASP_ACLKRCTL_CLKRDIV_OF(0)), MCASP_AHCLKRCTL_RMK( MCASP_AHCLKRCTL_HCLKRM_INTERNAL, MCASP_AHCLKRCTL_HCLKRP_FALLING, MCASP_AHCLKRCTL_HCLKRDIV_OF(20)), 0xFFFFFFFF, MCASP_RINTCTL_RMK( MCASP_RINTCTL_RSTAFRM_DISABLE, MCASP_RINTCTL_RDATA_DISABLE, MCASP_RINT