/**
******************************************************************************
* @file stm32f10x_tim.c
* @author MCD Application Team
* @version V3.6.1
* @date 05-March-2012
* @brief This file provides all the TIM firmware functions.
******************************************************************************
* @attention
*
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x_tim.h"
#include "stm32f10x_rcc.h"
/** @addtogroup STM32F10x_StdPeriph_Driver
* @{
*/
/** @defgroup TIM
* @brief TIM driver modules
* @{
*/
/** @defgroup TIM_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @defgroup TIM_Private_Defines
* @{
*/
/* ---------------------- TIM registers bit mask ------------------------ */
#define SMCR_ETR_Mask ((uint16_t)0x00FF)
#define CCMR_Offset ((uint16_t)0x0018)
#define CCER_CCE_Set ((uint16_t)0x0001)
#define CCER_CCNE_Set ((uint16_t)0x0004)
/**
* @}
*/
/** @defgroup TIM_Private_Macros
* @{
*/
/**
* @}
*/
/** @defgroup TIM_Private_Variables
* @{
*/
/**
* @}
*/
/** @defgroup TIM_Private_FunctionPrototypes
* @{
*/
static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
uint16_t TIM_ICFilter);
static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
uint16_t TIM_ICFilter);
static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
uint16_t TIM_ICFilter);
static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
uint16_t TIM_ICFilter);
/**
* @}
*/
/** @defgroup TIM_Private_Macros
* @{
*/
/**
* @}
*/
/** @defgroup TIM_Private_Variables
* @{
*/
/**
* @}
*/
/** @defgroup TIM_Private_FunctionPrototypes
* @{
*/
/**
* @}
*/
/** @defgroup TIM_Private_Functions
* @{
*/
/**
* @brief Deinitializes the TIMx peripheral registers to their default reset values.
* @param TIMx: where x can be 1 to 17 to select the TIM peripheral.
* @retval None
*/
void TIM_DeInit(TIM_TypeDef* TIMx)
{
/* Check the parameters */
assert_param(IS_TIM_ALL_PERIPH(TIMx));
if (TIMx == TIM1)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, DISABLE);
}
else if (TIMx == TIM2)
{
RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, DISABLE);
}
else if (TIMx == TIM3)
{
RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, DISABLE);
}
else if (TIMx == TIM4)
{
RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, DISABLE);
}
else if (TIMx == TIM5)
{
RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, DISABLE);
}
else if (TIMx == TIM6)
{
RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, DISABLE);
}
else if (TIMx == TIM7)
{
RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, DISABLE);
}
else if (TIMx == TIM8)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM8, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM8, DISABLE);
}
else if (TIMx == TIM9)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM9, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM9, DISABLE);
}
else if (TIMx == TIM10)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM10, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM10, DISABLE);
}
else if (TIMx == TIM11)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM11, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM11, DISABLE);
}
else if (TIMx == TIM12)
{
RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM12, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM12, DISABLE);
}
else if (TIMx == TIM13)
{
RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM13, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM13, DISABLE);
}
else if (TIMx == TIM14)
{
RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM14, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM14, DISABLE);
}
else if (TIMx == TIM15)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM15, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM15, DISABLE);
}
else if (TIMx == TIM16)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM16, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM16, DISABLE);
}
else
{
if (TIMx == TIM17)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM17, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM17, DISABLE);
}
}
}
/**
* @brief Initializes the TIMx Time Base Unit peripheral according to
* the specified parameters in the TIM_TimeBaseInitStruct.
* @param TIMx: where x can be 1 to 17 to select the TIM peripheral.
* @param TIM_TimeBaseInitStruct: pointer to a TIM_TimeBaseInitTypeDef
* structure that contains the configuration information for the
* specified TIM peripheral.
* @retval None
*/
void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct)
{
uint16_t tmpcr1 = 0;
/* Check the parameters */
assert_param(IS_TIM_ALL_PERIPH(TIMx));
assert_param(IS_TIM_COUNTER_MODE(TIM_TimeBaseInitStruct->TIM_CounterMode));
assert_param(IS_TIM_CKD_DIV(TIM_TimeBaseInitStruct->TIM_ClockDivision));
tmpcr1 = TIMx->CR1;
if((TIMx == TIM1) || (TIMx == TIM8)|| (TIMx == TIM2) || (TIMx == TIM3)||
(TIMx == TIM4) || (TIMx == TIM5))
{
/* Select the Counter Mode */
tmpcr1 &= (uint16_t)(~((uint16_t)(TIM_CR1_DIR | TIM_CR1_CMS)));
tmpcr1 |= (uint32_t)TIM_TimeBaseInitStruct->TIM_CounterMode;
}
if((TIMx != TIM6) && (TIMx != TIM7))
{
/* Set the clock division */
tmpcr1 &= (uint16_t)(~((uint16_t)TIM_CR1_CKD));
tmpcr1 |= (uint32_t)TIM_TimeBaseInitStruct->TIM_ClockDivision;
}
TIMx->CR1 = tmpcr1;
/* Set the Autoreload value */
TIMx->ARR = TIM_TimeBaseInitStruct->TIM_Period ;
/* Set the Prescaler value */
TIMx->PSC = TIM_TimeBaseInitStruct->TIM_Prescaler;
if ((TIMx == TIM1) || (TIMx == TIM8)|| (TIMx == TIM15)|| (TIMx == TIM16) || (TIMx == TIM17))
{
/* Set the Repetition Counter value */
TIMx->RCR = TIM_TimeBaseInitStruct->TIM_RepetitionCounter;
}
/* Generate an update event to reload the Prescaler and the Repetition counter
values immediately */
TIMx->EGR = TIM_PSCReloadMode_Immediate;
}
/**
* @brief Initializes the TIMx Channel1 according to the specified
* parameters in th
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将CANopen协议库代码移植到STM32F1工程中,网上资料比较少,这个工程能够直接编译通过,非常适合想将Canopen应用到嵌入式中的需求,
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STM32F10XX_CANOPEN.rar_canopen_canopen 应用_canopen协议移植_stm32CANop (232个子文件)
CAN.uvgui.Administrator 72KB
CanDemo.axf 474KB
CAN.uvgui_Vijayjannu.bak 158KB
CAN_uvproj.bak 67KB
CAN_uvopt.bak 55KB
stm32f10x_tim.c 107KB
stm32f10x_flash.c 61KB
CO_SDO.c 52KB
stm32f10x_rcc.c 50KB
CO_SDOmaster.c 50KB
stm32f10x_adc.c 46KB
stm32f10x_i2c.c 45KB
stm32f10x_can.c 44KB
stm32f10x_usart.c 38KB
CO_PDO.c 37KB
system_stm32f10x.c 36KB
system_stm32f10x.c 35KB
stm32f10x_fsmc.c 35KB
stm32f10x_spi.c 30KB
stm32f10x_dma.c 29KB
stm32f10x_sdio.c 28KB
stm32f10x_gpio.c 23KB
CANopen.c 22KB
CO_OD.c 20KB
stm32f10x_dac.c 19KB
core_cm3.c 17KB
co_driver.c 16KB
CO_Emergency.c 15KB
CO_SYNC.c 14KB
CO_NMT_Heartbeat.c 13KB
stm32f10x_cec.c 12KB
CO_HBconsumer.c 10KB
stm32f10x_rtc.c 9KB
stm32f10x_pwr.c 9KB
stm32f10x_bkp.c 8KB
misc.c 7KB
stm32f10x_exti.c 7KB
stm32f10x_wwdg.c 6KB
stm32f10x_dbgmcu.c 5KB
crc16-ccitt.c 5KB
stm32f10x_iwdg.c 5KB
main.c 4KB
isr.c 4KB
stm32f10x_crc.c 3KB
application.c 3KB
CO_common.c 2KB
led.c 2KB
timer.c 2KB
canopen.crf 385KB
isr.crf 377KB
main.crf 377KB
application.crf 376KB
co_pdo.crf 371KB
co_sdomaster.crf 366KB
co_sync.crf 362KB
co_od.crf 361KB
co_hbconsumer.crf 361KB
co_sdo.crf 361KB
co_nmt_heartbeat.crf 359KB
co_emergency.crf 358KB
stm32f10x_tim.crf 352KB
co_driver.crf 351KB
co_common.crf 341KB
timer.crf 340KB
stm32f10x_can.crf 339KB
stm32f10x_adc.crf 338KB
stm32f10x_rcc.crf 338KB
stm32f10x_flash.crf 338KB
stm32f10x_i2c.crf 337KB
stm32f10x_usart.crf 336KB
stm32f10x_dac.crf 336KB
stm32f10x_fsmc.crf 336KB
led.crf 336KB
stm32f10x_sdio.crf 335KB
stm32f10x_spi.crf 335KB
stm32f10x_gpio.crf 334KB
stm32f10x_dma.crf 334KB
system_stm32f10x.crf 332KB
stm32f10x_rtc.crf 332KB
stm32f10x_bkp.crf 332KB
stm32f10x_wwdg.crf 332KB
stm32f10x_pwr.crf 332KB
stm32f10x_dbgmcu.crf 331KB
stm32f10x_exti.crf 331KB
misc.crf 331KB
stm32f10x_crc.crf 331KB
stm32f10x_iwdg.crf 330KB
crc16-ccitt.crf 466B
application.d 2KB
canopen.d 2KB
co_hbconsumer.d 2KB
co_sdomaster.d 2KB
co_nmt_heartbeat.d 2KB
isr.d 2KB
main.d 2KB
co_emergency.d 2KB
co_sync.d 2KB
co_driver.d 2KB
co_pdo.d 2KB
stm32f10x_dbgmcu.d 2KB
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