#include <stdlib.h>
#include <malloc.h>
#include <stdio.h>
#include <termio.h>
#include <fcntl.h>
#include <stdlib.h>
#include <sys/mman.h>
#include <unistd.h>
#include <string.h>
#include <sys/ioctl.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <linux/types.h>
#include "/usr/include/linux/spi/spidev.h"
#include <sys/time.h>
#include <sys/socket.h>
#include <netinet/in.h>
void *mapped_base;
#define GPIO_BA 0xFFFFF400 // GPIO A
#define PIN_29 0x20000000 //pin 29 -binary: 1 and 29 zeros
#define PIN_28 0x10000000 //pin 28
#define PIN_27 0x8000000 //pin 27
#define PIN_26 0x4000000 //pin 26
#define PIN_25 0x2000000 //pin 25
#define PIN_24 0x1000000 //pin 24
#define PIN_23 0x800000 //pin 23
#define PIN_22 0x600000 //pin 22
#define MAP_BASE (GPIO_BA)
#define MAP_SIZE 4096Ul
#define MAP_MASK (MAP_SIZE - 1)
#define GPIO_EN_GPIO *(int*)(mapped_base+0x00) //enable register
#define GPIO_DIS_GPIO *(int*)(mapped_base+0x04) //disable register
#define GPIO_STAT_GPIO *(int*)(mapped_base+0x08) //status register
#define GPIO_EN_OUT *(int*)(mapped_base+0x10) //output enable register
#define GPIO_DIS_OUT *(int*)(mapped_base+0x14) //ooutput disable register
#define GPIO_SET_OUT *(int*)(mapped_base+0x30) //set output data register
#define GPIO_CLR_OUT *(int*)(mapped_base+0x34) //clear output data register
#define GPIO_PDSR *(int*)(mapped_base+0x3c) //pin data status register
#define GPIO_PUDR *(int*)(mapped_base+0x60) //enable pull-up data register
#define GPIO_PUER *(int*)(mapped_base+0x64) //disable pull-up data register
#define AD_RESET_LO GPIO_CLR_OUT = GPIO_CLR_OUT | PIN_27 // pin 27 low RESET
#define AD_RESET_HI GPIO_SET_OUT = GPIO_SET_OUT | PIN_27 // pin 27 hi RESET
#define AD_START_LO GPIO_CLR_OUT = GPIO_CLR_OUT | PIN_28 // pin 28 low START
#define AD_START_HI GPIO_SET_OUT = GPIO_SET_OUT | PIN_28 // pin 28 hi START
#define AD_DRDY (int)((GPIO_PDSR & PIN_29) >>29 ) // status of pin 29 DRDY
struct timeval tv1,tv2,dtv;
struct timezone tz;
void time_start() { gettimeofday(&tv1, &tz); }
long time_stop()
{
gettimeofday(&tv2, &tz);
dtv.tv_sec= tv2.tv_sec -tv1.tv_sec;
dtv.tv_usec=tv2.tv_usec-tv1.tv_usec;
if(dtv.tv_usec<0) { dtv.tv_sec--; dtv.tv_usec+=1000000; }
//return dtv.tv_sec*1000+dtv.tv_usec/10000;
return(dtv.tv_usec);
}
int main(void)
{
//----------------------------------------------------------------------------
// mapping GPIO Register
int fd;
if ((fd = open("/dev/mem", O_RDWR | O_SYNC)) == -1)
{
printf("Cannot open /dev/mem.\n");
exit(EXIT_FAILURE);
}
printf("/dev/mem opened.\n");
mapped_base = mmap(0, MAP_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, MAP_BASE & ~MAP_MASK);
if (mapped_base == (void *) -1)
{
printf("Memory mapping error.\n");
exit(EXIT_FAILURE);
}
mapped_base+=(MAP_BASE & MAP_MASK);
printf("Target address mapped 0x%08x-->0x%08x\n",(int) MAP_BASE,(int)mapped_base);
printf("GPIO_STAT_GPIO=%08X\n", GPIO_STAT_GPIO);
//-----------------------------------------------------------------------------
// Configure pins
//GPIO_EN_OUT = GPIO_EN_OUT | PIN_22; // set pin22 as output
//GPIO_EN_OUT = GPIO_EN_OUT | PIN_23; // set pin23 as output
//GPIO_EN_OUT = GPIO_EN_OUT | PIN_24; // set pin24 as output
//GPIO_EN_OUT = GPIO_EN_OUT | PIN_25; // set pin25 as output
//GPIO_EN_OUT = GPIO_EN_OUT | PIN_26; // set pin26 as output
//GPIO_CLR_OUT = GPIO_CLR_OUT | PIN_22; // pin 22 low
//GPIO_CLR_OUT = GPIO_CLR_OUT | PIN_23; // pin 23 low
//GPIO_CLR_OUT = GPIO_CLR_OUT | PIN_24; // pin 24 low
//GPIO_CLR_OUT = GPIO_CLR_OUT | PIN_25; // pin 25 low
//GPIO_CLR_OUT = GPIO_CLR_OUT | PIN_26; // pin 26 low
GPIO_EN_OUT = GPIO_EN_OUT | PIN_27; // set pin27 as output RESET
GPIO_EN_OUT = GPIO_EN_OUT | PIN_28; // set pin28 as output START
AD_RESET_HI;
AD_START_LO;
GPIO_DIS_OUT = GPIO_DIS_OUT | PIN_29; // set pin29 fuction as input DRDY
GPIO_PUER=GPIO_PUDR | PIN_29; // pull-up for pin 29
//------------------------------------------------------------------------------
// configure spi
int fs;
int status;
unsigned char u8_ret;
unsigned int u32_ret;
struct spi_ioc_transfer xfer[2];
unsigned char buf_tx[28];
unsigned char buf_rx[28];
// open spi device
fs = open("/dev/spidev1.0",O_RDWR);
if (fs == -1)
{
printf("error on open device,%d\n",fd);
return -1;
}
// set spi mode
u8_ret = 3;
status = ioctl(fs,SPI_IOC_WR_MODE,&u8_ret);
printf("set MODED(%d) :0x%x\n",status,u8_ret);
// set bits per word
u8_ret = 8;
status = ioctl(fs,SPI_IOC_WR_BITS_PER_WORD,&u8_ret);
printf("set BITS_PER_WORD(%d) :0x%x\n",status,u8_ret);
//set max speed hz
u32_ret = 1*1000*1000;
status = ioctl(fs,SPI_IOC_WR_MAX_SPEED_HZ,&u32_ret);
printf("set MAX_SPEED_HZ(%d) :0x%x\n",status,u32_ret);
//read parameters
status = ioctl(fs,SPI_IOC_RD_MODE,&u8_ret);
printf("RD_MODE(%d): 0x%x\n",status,u8_ret);
status = ioctl(fs,SPI_IOC_RD_LSB_FIRST,&u8_ret);
printf("LSB_FIRST(%d): 0x%x\n",status,u8_ret);
status = ioctl(fs,SPI_IOC_RD_BITS_PER_WORD,&u8_ret);
printf("BITS_PER_WORD(%d): 0x%x\n",status,u8_ret);
status = ioctl(fs,SPI_IOC_RD_MAX_SPEED_HZ,&u32_ret);
printf("MAX_SPEED_HZ(%d): %d Hz\n",status,u32_ret);
//clear buffers spi
memset(xfer, 0, sizeof xfer);
memset(buf_tx, 0, sizeof buf_tx);
memset(buf_rx, 0, sizeof buf_rx);
//----------------------------------------------------------------------------
// initialize adc
unsigned char adc_send=0x00;
unsigned char adc_resv=0x00;
printf("===================\n");
printf("===START PROGRAM===\n");
//resert adc
printf("RESET ADS1298 ........ ");
AD_RESET_LO;
usleep(100000);
AD_RESET_HI;
usleep(1000000);
printf("OK \n");
//stop default rdatac mode
printf("SDATAC command ........ ");
memset(buf_tx, 0, sizeof buf_tx);
memset(buf_rx, 0, sizeof buf_rx);
buf_tx[0]=0x11;
xfer[0].tx_buf = (__u64) buf_tx;
xfer[0].rx_buf = (__u64) buf_rx;
xfer[0].len = 1;
status = ioctl(fs, SPI_IOC_MESSAGE(1), xfer);
if (status>0) printf("OK(%d)\n",status); else printf("ERR");
printf("ioctl return %d, send=%x,resv=%x\n",status,buf_tx[0],buf_rx[0]);
// config registers adc
printf("WREG command ........ ");
memset(buf_tx, 0, sizeof buf_tx);
memset(buf_rx, 0, sizeof buf_rx);
buf_tx[0]=0x40 | 0x01; // write (0x40 ) 3 adc status regs from 0x01
buf_tx[1]=0x02; //2 (3-1)
buf_tx[2]=0x86; // reg 0x01 CONFIG1 0x86-500Hz, 0x80-32kHz 83-4 kHz
buf_tx[3]=0x00; // reg 0x02 CONFIG2
buf_tx[4]=0xC0; // reg 0x02 CONFIG3
xfer[0].tx_buf = (__u64) buf_tx;
xfer[0].rx_buf = (__u64) buf_rx;
xfer[0].len = 5;
status = ioctl(fs, SPI_IOC_MESSAGE(1), xfer);
if (status>0) printf("OK(%d)\n",status); else printf("ERR");
// config channels adc
printf("CHnSET 0x00 command ........ ");
memset(buf_tx, 0, sizeof buf_tx);
memset(buf_rx, 0, sizeof buf_rx);
buf_tx[0]=0x40 | 0x05; // write (0x40) 8 status regs from 0x05
buf_tx[1]=0x07; //7 (8-1)
buf_tx[2]=0x00; //ch0
buf_tx[3]=0x00; //ch1
buf_tx[4]=0x00; //ch2
buf_tx[5]=0x00; //ch3
buf_tx[6]=0x00; //ch4
buf_tx[7]=0x00; //ch5
buf_tx[8]=0x00; //ch6
buf_tx[9]=0x00; //ch7
xfer[0].tx_buf = (__u64) buf_tx;
xfer[0].rx_buf = (__u64) buf_rx;
xfer[0].len = 10;
status = ioctl(fs, SPI_IOC_MESSAGE(1), xfer);
if (status>0) printf("OK(%d)\n",status); else printf("ERR");
// read adc status reg
printf("RREG command ........ ");
memset(buf_tx, 0, sizeof buf_tx);
memset(buf_rx, 0, sizeof buf_rx);
buf_tx[0]=0x20 | 0x00; // read (0x20) 13 adc status regs from 0x00
buf_tx[1]=0x0C; //12 (13-1)
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