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RTL8711AF
SINGLE-CHIP 802.11b/g/n 1T1R WLAN SoC
Pre-Release DATASHEET
(CONFIDENTIAL: Development Partners Only)
Rev. 0.1
26 July 2015
Track ID: JATR
Realtek Semiconductor Corp.
No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
Tel.: +886-3-578-0211. Fax: +886-3-577-6047
www.realtek.com
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Data Sheet
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COPYRIGHT
© 2015 Realtek Semiconductor Corp. All rights reserved. No part of this document may be reproduced,
transmitted, transcribed, stored in a retrieval system, or translated into any language in any form or by
any means without the written permission of Realtek Semiconductor Corp.
DISCLAIMER
Realtek provides this document “as is”, without warranty of any kind. Realtek may make improvements
and/or changes in this document or in the product described in this document at any time. This
document could include technical inaccuracies or typographical errors.
TRADEMARKS
Realtek is a trademark of Realtek Semiconductor Corporation. Other names mentioned in this
document are trademarks/registered trademarks of their respective owners.
USING THIS DOCUMENT
This document is intended for the software engineer’s reference and provides detailed programming
information.
Though every effort has been made to ensure that this document is current and accurate, more
information may have become available subsequent to the production of this guide.
REVISION HISTORY
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Revision
Release Date
Summary
0.0
2014/0 9/30
Preliminary release.
0.0
2015/03/05
update PINMUX table
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Table of Contents
1. GENERAL DESCRIPTION ................................................................................................. 1
2. FEATURES ......................................................................................................................... 2
3. BLOCK DIAGRAM ............................................................................................................. 4
3.1. FUNCTIONAL BLOCK DIAGRAM .......................................................................................... 4
3.2. WIFI AND NFC APPLICATION DIAGRAM ............................................................................. 5
3.3. POWER SUPPLY APPLICATION DIAGRAM ............................................................................ 6
4. MEMORY MAPPING .......................................................................................................... 7
4.1. PROGRAMMING SPACE ..................................................................................................... 7
4.2. IO SPACE ....................................................................................................................... 8
4.3. EXTENSION MEMORY SPACE .......................................................................................... 12
5. PIN ASSIGNMENTS ......................................................................................................... 13
5.1. PACKAGE IDENTIFICATION .............................................................................................. 13
6. PIN DESCRIPTIONS ........................................................................................................ 14
6.1. POWER ON TRAP PIN .................................................................................................... 14
6.2. RF AND NFC ................................................................................................................ 15
6.3. POWER PINS ................................................................................................................. 15
6.4. CLOCK PINS ................................................................................................................. 16
6.5. DIGITAL IO PINS ............................................................................................................ 16
6.6. SDIO INTERFACE .......................................................................................................... 18
7. PIN FUNCTION TABLE .................................................................................................... 19
7.1. PIN CONFIGURABLE FUNCTION GROUP SUMMARY TABLE .................................................. 19
8. FUNCTIONAL DESCRIPTION ......................................................................................... 20
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8.1. POWER MANAGEMENT CONTROL UNIT ............................................................................ 20
8.1.1. Features ................................................................................................................... 20
8.1.2. Power Mode Description .......................................................................................... 20
8.2. MEMORY SYSTEM .......................................................................................................... 22
8.2.1. Memory Architecture ................................................................................................ 22
8.2.2. Internal ROM ............................................................................................................ 22
8.2.3. Internal SRAM .......................................................................................................... 23
8.2.4. SPI NOR Flash......................................................................................................... 23
8.3. GENERAL PURPOSE DMA CONTRLLER ............................................................................ 25
8.3.1. Features of GDMA ................................................................................................... 25
8.4. GENERAL PURPOSE TIMER ............................................................................................. 25
8.4.1. Features of GTimer .................................................................................................. 25
8.5. GPIO FUNCTIONS ......................................................................................................... 25
8.5.1. Features of GPIO ..................................................................................................... 25
8.6. UART INTERFACE CHARACTERISTICS ............................................................................. 26
8.6.1. Features of UART .................................................................................................... 26
8.6.2. High Speed UART Specification .............................................................................. 26
8.6.3. UART Interface Signal Levels .................................................................................. 28
8.7. SPI INTERFACE ............................................................................................................ 28
8.7.1. Features of SPI ........................................................................................................ 28
8.8. I2C INTERFACE ............................................................................................................. 29
8.8.1. Features of I2C ........................................................................................................ 29
8.9. PWM INTERFACE .......................................................................................................... 30
8.9.1. Features of PWM ..................................................................................................... 30
8.10. EXTERNAL TRIGGER EVENT INTERFACE ........................................................................... 30
8.10.1. Features of External Trigger Event ....................................................................... 30
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