ADS7816.rar_ADS7052verilog_ADS8411 verilog_ads1271 verilog_ads78

Release 9.1i - par J.30 Copyright (c) 1995-2007 Xilinx, Inc. All rights reserved. Sat Oct 30 17:15:07 2010 INFO: The IO information is provided in three file formats as part of the Place and Route (PAR) process. These formats are: 1. The <design name>_pad.txt file (this file) designed to provide information on IO usage in a human readable ASCII text format viewable through common text editors. 2. The <design namd>_pad.csv file for use with spreadsheet programs such as MS Excel. This file can also be read by PACE to communicate post PAR IO information. 3. The <design name>.pad file designed for parsing by customers. It uses the "|" as a data field separator. INPUT FILE: ADS7816_map.ncd OUTPUT FILE: ADS7816_pad.txt PART TYPE: xc3s400 SPEED GRADE: -5 PACKAGE: pq208 Pinout by Pin Number: +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ |Pin Number|Signal Name|Pin Usage|Pin Name |Direction|IO Standard|IO Bank Number|Drive (mA)|Slew Rate|Termination|IOB Delay|Voltage |Constraint|DCI Value|IO Register|Signal Integrity| +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ |P1 | | |GND | | | | | | | | | | | | | |P2 |cs |IOB |IO_L01P_7/VRN_7 |OUTPUT |LVCMOS25 |7 |12 |SLOW |NONE** | | |LOCATED | |NO |NONE | |P3 |din |IOB |IO_L01N_7/VRP_7 |INPUT |LVCMOS25 |7 | | | |IFD | |LOCATED | |YES |NONE | |P4 |dclk |IOB |IO_L16P_7/VREF_7 |OUTPUT |LVCMOS25 |7 |12 |SLOW |NONE** | | |LOCATED | |NO |NONE | |P5 |ad_data<8> |IOB |IO_L16N_7 |OUTPUT |LVCMOS25 |7 |12 |SLOW |NONE** | | | | |NO |NONE | |P6 | | |VCCO_7 | | |7 | | | | |2.50 | | | | | |P7 |ad_data<3> |IOB |IO_L19P_7 |OUTPUT |LVCMOS25 |7 |12 |SLOW |NONE** | | | | |NO |NONE | |P8 | | |GND | | | | | | | | | | | | | |P9 |ad_data<7> |IOB |IO_L19N_7/VREF_7 |OUTPUT |LVCMOS25 |7 |12 |SLOW |NONE** | | | | |NO |NONE | |P10 |done |IOB |IO_L20P_7 |OUTPUT |LVCMOS25 |7 |12 |SLOW |NONE** | | | | |YES |NONE | |P11 |ad_data<6> |IOB |IO_L20N_7 |OUTPUT |LVCMOS25 |7 |12 |SLOW |NONE** | | | | |NO |NONE | |P12 |ad_data<0> |IOB |IO_L21P_7 |OUTPUT |LVCMOS25 |7 |12 |SLOW |NONE** | | | | |NO |NONE | |P13 |ad_data<4> |IOB |IO_L21N_7 |OUTPUT |LVCMOS25 |7 |12 |SLOW |NONE** | | | | |NO |NONE | |P14 | | |GND | | | | | | | | | | | | | |P15 |ad_data<2> |IOB |IO_L22P_7 |OUTPUT |LVCMOS25 |7 |12 |SLOW |NONE** | | | | |NO |NONE | |P16 |ad_data<11>|IOB |IO_L22N_7 |OUTPUT |LVCMOS25 |7 |12 |SLOW |NONE** | | | | |NO |NONE | |P17 | | |VCCAUX | | | | | | | |2.5 | | | | | |P18 | |DIFFM |IO_L23P_7 |UNUSED | |7 | | | | | | | | | | |P19 |ad_data<5> |IOB |IO_L23N_7 |OUTPUT |LVCMOS25 |7 |12 |SLOW |NONE** | | | | |NO |NONE | |P20 | |DIFFM |IO_L24P_7 |UNUSED | |7 | | | | | | | | | | |P21 | |DIFFS |IO_L24N_7 |UNUSED | |7 | | | | | | | | | | |P22 | |DIFFM |IO_L39P_7 |UNUSED | |7 | | | | | | | | | | |P23 | | |VCCO_7 | | |7 | | | | |2.50 | | | | | |P24 | |DIFFS |IO_L39N_7 |UNUSED | |7 | | | | | | | | | | |P25 | | |GND | | | | | | | | | | | | | |P26 | |DIFFM |IO_L40P_7 |UNUSED | |7 | | | | | | | | | | |P27 | |DIFFS |IO_L40N_7/VREF_7 |UNUSED | |7 | | | | | | | | | | |P28 | |DIFFM |IO_L40P_6/VREF_6 |UNUSED | |6 | | | | | | | | | | |P29 | |DIFFS |IO_L40N_6 |UNUSED | |6 | | | | | | | | | | |P30 | | |GND | | | | | | | | | | | | | |P31 | |DIFFM |IO_L39P_6 |UNUSED | |6 | | | | | | | | | | |P32 | | |VCCO_6 | | |6 | | | | |any******| | | | | |P33 | |DIFFS |IO_L39N_6 |UNUSED | |6 | | | | | | | | | | |P34 | |DIFFM |IO_L24P_6 |UNUSED | |6 | | | | | |