//--------------------------------------------------------------------------------------
// Includes
//--------------------------------------------------------------------------------------
#include <c8051f060.h> // SFR declarations
#include <stdio.h>
#include <absacc.h>
#define DMA_BLOCK_SIZE 1024
#define data_type xdata
typedef unsigned int u16;
typedef unsigned char u8;
#define OSC_EXT 1
//-----------------------------------------------------------------------------
// 16-bit SFR Definitions for 'F06x
//-----------------------------------------------------------------------------
sfr16 RCAP3 = 0xCA; // Timer3 reload value
sfr16 TMR3 = 0xCC; // Timer3 counter
sfr16 ADC0 = 0xBE; // ADC0 Data
sfr16 ADC0GT = 0xc4;
sfr16 ADC0LT = 0xc6;
sfr16 DMA0DS = 0xDB; /* DMA0 DATA ADDRESS POINTER LOW BYTE */ // DMA0 XRAM Address Pointer
sfr16 DMA0CT = 0xF9; /* DMA0 REPEAT COUNTER LIMIT LOW BYTE */ // DMA0 Repeat Counter Limit 256 times
sfr16 DMA0DA = 0xD9; /* DMA0 DATA ADDRESS BEGINNING LOW BYTE */ // DMA0 Address Beginning
sfr16 DMA0CS = 0xFB; /* DMA0 REPEAT COUNTER STATUS LOW BYTE */ // DMA0 Repeat Counter
//------------------------------------------------------------------------------------
// Global CONSTANTS
//------------------------------------------------------------------------------------
#define SYSCLK 22118400 // SYSCLK frequency in Hz
#define BAUDRATE 115200 // Baud Rate for UART0
#define FT245PORT XBYTE[0xB000]
// DMA INSTRUCTIONS
#define DMA0_END_OF_OP 0x00 // End-of-Operation
#define DMA0_END_OF_OP_C 0x80 // End-of-Operation + Continue
#define DMA0_GET_ADC0 0x10 // Retrieve ADC0 Data
#define DMA0_GET_ADC1 0x20 // Retrieve ADC1 Data
#define DMA0_GET_ADC01 0x30 // Retrieve ADC0 and ADC1 Data
#define DMA0_GET_DIFF 0x40 // Retrieve Differential Data
#define DMA0_GET_DIFF1 0x60 // Retrieve Differential and ADC1 Data
#define COMMD_HEADER 0xaa
#define COMMD_LEN 3
#define NUM_SAMPLES DMA_BLOCK_SIZE // Number of ADC sample to acquire (each sample 2 bytes)
#define XRAM_START_ADD 0x1000 // DMA0 XRAM Start address of ADC data log
#define SAMP_RATE 500000 // ADC sample rate in Hz
volatile u8 data gFulF;
sbit RAM_CS = P5^7; // chip select bit is P5^7
sbit nTXE = P0^0;
sbit nRXF = P0^1;
//------------------------------------------------------------------------------------
// Function PROTOTYPES
//------------------------------------------------------------------------------------
void SYSCLK_Init (void);
void UART0_Init (void);
void PORT_Init (void);
void ADC0_Init (void);
void DMA0_Init (void);
void Timer3_Init (int counts);
void EMIF_Init (void);
void SendData(void);
//-------------------------
// Global Variables
//-------------------------
unsigned int xdata *read_ptr;
unsigned int xdata gIDataBuffer[NUM_SAMPLES];
unsigned char data gComLine[COMMD_LEN];
//------------------------------------------------------------------------------------
// MAIN Routine
//------------------------------------------------------------------------------------
void cpy_OffXram_to_OnXram(unsigned int* off_addr,unsigned int*on_addr,unsigned int len );
void GetCommd(unsigned char *commdline,unsigned char len);
char GetChar(void);
void SendChar(unsigned char ch);
void SendChar(unsigned char ch)
{
while(nTXE == 1);
FT245PORT = ch;
}
char GetChar(void)
{
while(nRXF);
return FT245PORT;
}
void GetCommd(unsigned char *commdline,unsigned char len)
{
unsigned char tmp, i;
for(i=0;i<len;i++)
gComLine[i]=0;
tmp = 0;
while(tmp != COMMD_HEADER)
{
tmp = GetChar();
}
gComLine[0] = tmp;
for(i=1;i<len;i++)
gComLine[i]=GetChar();
}
void SendCommd(unsigned char *commdline, unsigned len)
{
unsigned char i;
for(i=0;i<len;i++)
{
SendChar(*(commdline+i));
}
}
char Is_ASK_Send()// host ask target to send
{
if((gComLine[0] == 0xaa)&&(gComLine[1] ==0x55)&&(gComLine[2] ==0x03))
return 1;
else
return 0;
}
void main (void)
{
volatile unsigned char data GetBuffer[3]= {0,0,0};
unsigned char data i=0;
char old_SFRPAGE = SFRPAGE;
WDTCN = 0xde; // disable watchdog timer
WDTCN = 0xad;
SYSCLK_Init (); // initialize SYSCLK
PORT_Init ();
EMIF_Init (); // Storing ADC samples in SRAM on the target board.
SFRPAGE = CONFIG_PAGE;
RAM_CS = 0; // assert SRAM chip select
Timer3_Init (SYSCLK/SAMP_RATE); // Init Timer3 for 100ksps sample rate
ADC0_Init(); // configure ADC0
ADC0CN |= 0x80;
DMA0_Init ();
gFulF = 0;
i=0;
while(1)
{
SFRPAGE = LEGACY_PAGE; //LEGACY_PAGE;
GetCommd(gComLine,COMMD_LEN);
if(Is_ASK_Send())
{
if(gFulF)
{
SendData(); // data sending
gFulF =0;
GetBuffer[0] = 0;
GetBuffer[1] = 0;
GetBuffer[2] = 0;
DMA0_Init();
gFulF=0;
}
}
}
}
//------------------------------------------------------------------------------------
// PORT_Init
//------------------------------------------------------------------------------------
//
// Configure the Crossbar and GPIO ports
//
void PORT_Init (void)
{
char old_SFRPAGE = SFRPAGE;
SFRPAGE = CONFIG_PAGE; // Switch to configuration page
SFRPAGE = old_SFRPAGE; // restore SFRPAGE
}
//-----------------------------------------------------------------------------
// SYSCLK_Init
//-----------------------------------------------------------------------------
#if OSC_EXT
void SYSCLK_Init (void)
{
char old_SFRPAGE = SFRPAGE;
int i;
SFRPAGE = CONFIG_PAGE; // Switch to Configuration Page
OSCXCN = 0x67; // start external oscillator with
// 22.1184MHz crystal on TB
for (i=0; i <5000; i++) ; // XTLVLD blanking interval (>1ms)
while (!(OSCXCN & 0x80)) ; // Wait for crystal osc. to settle
RSTSRC = 0x04; // enable missing clock detector reset
CLKSEL = 0x01; // change to external crystal
OSCICN = 0x00; // disable internal oscillator
SFRPAGE = old_SFRPAGE; // restore SFRPAGE
}
#else
void SYSCLK_Init(void)
{
OSCICN = 0x07;
}
#endif
//-----------------------------------------------------------------------------
// ADC0_Init
//-----------------------------------------------------------------------------
void ADC0_Init (void)
{
char old_SFRPAGE = SFRPAGE;
int i;
SFRPAGE = ADC0_PAGE; // Switch to ADC0 Page
ADC0CN = 0x04; // ADC Disabled, Timer3 start-of-conversion
// track 16 SAR clocks before data conversion
// upon Timer3 OV. DMA will enable ADC as needed
//
REF0CN = 0x03; // turn on bias generator and internal reference.
for(i=0;i<10000;i++); // Wait for Vref to settle (large cap