STM32.zip_stm32寄存器资源-CSDN文库

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STM32是一款基于ARM Cortex-M内核的微控制器系列，由意法半导体（STMicroelectronics）生产。在STM32的开发过程中，了解并熟练掌握其寄存器是至关重要的，因为寄存器是直接控制和配置MCU硬件功能的核心途径。STM32F103是STM32系列中的一款经典产品，它拥有丰富的外设接口和高性能计算能力，广泛应用于各种嵌入式系统。标题中的"STM32.zip_stm32 寄存器"指出这是一个关于STM32F103寄存器的压缩包资源，可能包含了该微控制器所有相关寄存器的定义和描述，这对于开发者来说是必不可少的参考资料。通过这些头文件，开发者可以直接操作硬件寄存器，实现对STM32F103的底层控制。描述中的"STM32F103开发必备的头文件，寄存器版本"进一步确认了这个压缩包的内容，强调了这些头文件对于STM32F103的开发工作至关重要。寄存器版本意味着这些文件提供了寄存器级别的编程接口，适合进行低级编程和优化。标签"stm32_寄存器"则明确了主题，便于搜索和归类。 "STM32共用头文件"可能包含了一系列通用的头文件，如`stm32f10x.h`，这个头文件通常包含了STM32F103系列的所有寄存器定义、中断向量定义以及一些常用宏定义。开发者可以在这个头文件中找到如RCC（Reset and Clock Control）寄存器，用于设置系统时钟；GPIO（General-purpose input/output）寄存器，用于管理端口输入输出；NVIC（Nested Vectored Interrupt Controller）寄存器，用于处理中断；以及其他外设如定时器、串口等的寄存器定义。在实际开发中，例如，若要开启STM32F103的GPIOB的第5个引脚作为输出，开发者需要首先包含相应的头文件，然后使用如下代码： ```c #include "stm32f10x.h" // 初始化GPIOB的第5个引脚为推挽输出，速度为50MHz GPIO_InitTypeDef GPIO_InitStructure; RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); // 开启GPIOB时钟 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5; // 选择PB5 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; // 推挽输出 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; // 速度等级 GPIO_Init(GPIOB, &GPIO_InitStructure); // 初始化GPIO ``` 以上代码中，`RCC_APB2PeriphClockCmd`函数通过修改RCC相关的寄存器来开启GPIOB的时钟，`GPIO_Init`函数则是通过设置GPIOB的GPIO_InitStructure结构体来初始化GPIOB的第5个引脚。 STM32的寄存器编程涉及的内容广泛且深入，包括但不限于电源管理、中断管理、时钟配置、GPIO控制、定时器设置等多个方面。熟练掌握这些寄存器的使用，将有助于开发者更高效地利用STM32F103的硬件资源，实现各种复杂功能。

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STM32.zip （2个子文件）

STM32共用头文件

stm32f10x_nvic.h 19KB

stm32f10x_map.h 28KB

/******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** * File Name : stm32f10x_map.h * Author : MCD Application Team * Version : V2.0.1 * Date : 06/13/2008 * Description : This file contains all the peripheral register's definitions * and memory mapping. ******************************************************************************** * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. *******************************************************************************/ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F10x_MAP_H #define __STM32F10x_MAP_H #ifndef EXT #define EXT extern #endif /* EXT */ /* Includes ------------------------------------------------------------------*/ #include "stm32f10x_conf.h" #include "stm32f10x_type.h" #include "cortexm3_macro.h" /* Exported types ------------------------------------------------------------*/ /******************************************************************************/ /* Peripheral registers structures */ /******************************************************************************/ /*------------------------ Analog to Digital Converter -----------------------*/ typedef struct { vu32 SR; vu32 CR1; vu32 CR2; vu32 SMPR1; vu32 SMPR2; vu32 JOFR1; vu32 JOFR2; vu32 JOFR3; vu32 JOFR4; vu32 HTR; vu32 LTR; vu32 SQR1; vu32 SQR2; vu32 SQR3; vu32 JSQR; vu32 JDR1; vu32 JDR2; vu32 JDR3; vu32 JDR4; vu32 DR; } ADC_TypeDef; /*------------------------ Backup Registers ----------------------------------*/ typedef struct { u32 RESERVED0; vu16 DR1; u16 RESERVED1; vu16 DR2; u16 RESERVED2; vu16 DR3; u16 RESERVED3; vu16 DR4; u16 RESERVED4; vu16 DR5; u16 RESERVED5; vu16 DR6; u16 RESERVED6; vu16 DR7; u16 RESERVED7; vu16 DR8; u16 RESERVED8; vu16 DR9; u16 RESERVED9; vu16 DR10; u16 RESERVED10; vu16 RTCCR; u16 RESERVED11; vu16 CR; u16 RESERVED12; vu16 CSR; u16 RESERVED13[5]; vu16 DR11; u16 RESERVED14; vu16 DR12; u16 RESERVED15; vu16 DR13; u16 RESERVED16; vu16 DR14; u16 RESERVED17; vu16 DR15; u16 RESERVED18; vu16 DR16; u16 RESERVED19; vu16 DR17; u16 RESERVED20; vu16 DR18; u16 RESERVED21; vu16 DR19; u16 RESERVED22; vu16 DR20; u16 RESERVED23; vu16 DR21; u16 RESERVED24; vu16 DR22; u16 RESERVED25; vu16 DR23; u16 RESERVED26; vu16 DR24; u16 RESERVED27; vu16 DR25; u16 RESERVED28; vu16 DR26; u16 RESERVED29; vu16 DR27; u16 RESERVED30; vu16 DR28; u16 RESERVED31; vu16 DR29; u16 RESERVED32; vu16 DR30; u16 RESERVED33; vu16 DR31; u16 RESERVED34; vu16 DR32; u16 RESERVED35; vu16 DR33; u16 RESERVED36; vu16 DR34; u16 RESERVED37; vu16 DR35; u16 RESERVED38; vu16 DR36; u16 RESERVED39; vu16 DR37; u16 RESERVED40; vu16 DR38; u16 RESERVED41; vu16 DR39; u16 RESERVED42; vu16 DR40; u16 RESERVED43; vu16 DR41; u16 RESERVED44; vu16 DR42; u16 RESERVED45; } BKP_TypeDef; /*------------------------ Controller Area Network ---------------------------*/ typedef struct { vu32 TIR; vu32 TDTR; vu32 TDLR; vu32 TDHR; } CAN_TxMailBox_TypeDef; typedef struct { vu32 RIR; vu32 RDTR; vu32 RDLR; vu32 RDHR; } CAN_FIFOMailBox_TypeDef; typedef struct { vu32 FR1; vu32 FR2; } CAN_FilterRegister_TypeDef; typedef struct { vu32 MCR; vu32 MSR; vu32 TSR; vu32 RF0R; vu32 RF1R; vu32 IER; vu32 ESR; vu32 BTR; u32 RESERVED0[88]; CAN_TxMailBox_TypeDef sTxMailBox[3]; CAN_FIFOMailBox_TypeDef sFIFOMailBox[2]; u32 RESERVED1[12]; vu32 FMR; vu32 FM1R; u32 RESERVED2; vu32 FS1R; u32 RESERVED3; vu32 FFA1R; u32 RESERVED4; vu32 FA1R; u32 RESERVED5[8]; CAN_FilterRegister_TypeDef sFilterRegister[14]; } CAN_TypeDef; /*------------------------ CRC calculation unit ------------------------------*/ typedef struct { vu32 DR; vu8 IDR; u8 RESERVED0; u16 RESERVED1; vu32 CR; } CRC_TypeDef; /*------------------------ Digital to Analog Converter -----------------------*/ typedef struct { vu32 CR; vu32 SWTRIGR; vu32 DHR12R1; vu32 DHR12L1; vu32 DHR8R1; vu32 DHR12R2; vu32 DHR12L2; vu32 DHR8R2; vu32 DHR12RD; vu32 DHR12LD; vu32 DHR8RD; vu32 DOR1; vu32 DOR2; } DAC_TypeDef; /*------------------------ Debug MCU -----------------------------------------*/ typedef struct { vu32 IDCODE; vu32 CR; }DBGMCU_TypeDef; /*------------------------ DMA Controller ------------------------------------*/ typedef struct { vu32 CCR; vu32 CNDTR; vu32 CPAR; vu32 CMAR; } DMA_Channel_TypeDef; typedef struct { vu32 ISR; vu32 IFCR; } DMA_TypeDef; /*------------------------ External Interrupt/Event Controller ---------------*/ typedef struct { vu32 IMR; vu32 EMR; vu32 RTSR; vu32 FTSR; vu32 SWIER; vu32 PR; } EXTI_TypeDef; /*------------------------ FLASH and Option Bytes Registers ------------------*/ typedef struct { vu32 ACR; vu32 KEYR; vu32 OPTKEYR; vu32 SR; vu32 CR; vu32 AR; vu32 RESERVED; vu32 OBR; vu32 WRPR; } FLASH_TypeDef; typedef struct { vu16 RDP; vu16 USER; vu16 Data0; vu16 Data1; vu16 WRP0; vu16 WRP1; vu16 WRP2; vu16 WRP3; } OB_TypeDef; /*------------------------ Flexible Static Memory Controller -----------------*/ typedef struct { vu32 BTCR[8]; } FSMC_Bank1_TypeDef; typedef struct { vu32 BWTR[7]; } FSMC_Bank1E_TypeDef; typedef struct { vu32 PCR2; vu32 SR2; vu32 PMEM2; vu32 PATT2; u32 RESERVED0; vu32 ECCR2; } FSMC_Bank2_TypeDef; typedef struct { vu32 PCR3; vu32 SR3; vu32 PMEM3; vu32 PATT3; u32 RESERVED0; vu32 ECCR3; } FSMC_Bank3_TypeDef; typedef struct { vu32 PCR4; vu32 SR4; vu32 PMEM4; vu32 PATT4; vu32 PIO4; } FSMC_Bank4_TypeDef; /*------------------------ General Purpose and Alternate Function IO ---------*/ typedef struct { vu32 CRL; vu32 CRH; vu32 IDR; vu32 ODR; vu32 BSRR; vu32 BRR; vu32 LCKR; } GPIO_TypeDef; typedef struct { vu32 EVCR; vu32 MAPR; vu32 EXTICR[4]; } AFIO_TypeDef; /*------------------------ Inter-integrated Circuit Interface ----------------*/ typedef struct { vu16 CR1; u16 RESERVED0; vu16 CR2; u16 RESERVED1; vu16 OAR1; u16 RESERVED2; vu16 OAR2; u16 RESERVED3; vu16 DR; u16 RESERVED4; vu16 SR1; u16 RESERVED5; vu16 SR2; u16 RESERVED6; vu16 CCR; u16 RESERVED7; vu16 TRISE; u16 RESERVED8; } I2C_TypeDef; /*------------------------ Independent WATCHDOG ------------------------------*/ typedef struct { vu32 KR; vu32 PR; vu32 RLR; vu32 SR; } IWDG_TypeDef; /*------------------------ Nested Vectored Interrupt Controller --------------*/ typedef struct { vu32 ISER[2]; u32 RESERVED0[30]; vu32 ICER[2]; u32 RSERVED1[30]; vu32 ISPR[2]; u32 RESERVED2[30]; vu32 ICPR[2]; u32 RESERVED3[30]; vu32 IABR[2]; u32 RESERVED4[62]; vu32 IPR[15]; } NVIC_TypeDef; typedef struct { vuc32 CPUID; vu32 ICSR; vu32 VTOR; vu32 AIRCR; vu32 SCR;

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