TMS320x2833x, 2823x Serial Communications
Interface (SCI)
Reference Guide
Literature Number: SPRUFZ5A
August 2008 – Revised July 2009
Contents
Preface ............................................................................................................................... 7
1 Overview ................................................................................................................. 11
1.1 Enhanced SCI Module Overview ......................................................................................... 12
1.2 Architecture ................................................................................................................. 14
1.2.1 SCI Module Signal Summary .................................................................................... 15
1.2.2 Multiprocessor and Asynchronous Communication Modes .................................................. 15
1.2.3 SCI Programmable Data Format ................................................................................ 15
1.2.4 SCI Multiprocessor Communication ............................................................................ 16
1.2.5 Idle-Line Multiprocessor Mode................................................................................... 17
1.2.6 Address-Bit Multiprocessor Mode ............................................................................... 18
1.2.7 SCI Communication Format ..................................................................................... 19
1.2.8 SCI Port Interrupts ................................................................................................ 21
1.2.9 SCI Baud Rate Calculations ..................................................................................... 22
1.2.10 SCI Enhanced Features ......................................................................................... 22
2 SCI Registers ........................................................................................................... 25
2.1 SCI Module Register Summary .......................................................................................... 26
2.2 SCI Communication Control Register (SCICCR) ...................................................................... 26
2.3 SCI Control Register 1 (SCICTL1) ....................................................................................... 27
2.4 SCI Baud-Select Registers (SCIHBAUD, SCILBAUD) ................................................................ 30
2.5 SCI Control Register 2 (SCICTL2) ....................................................................................... 30
2.6 SCI Receiver Status Register (SCIRXST) .............................................................................. 31
2.7 Receiver Data Buffer Registers (SCIRXEMU, SCIRXBUF) .......................................................... 33
2.7.1 Emulation Data Buffer (SCIRXEMU) ........................................................................... 33
2.7.2 Receiver Data Buffer (SCIRXBUF) ............................................................................. 33
2.8 SCI Transmit Data Buffer Register (SCITXBUF) ....................................................................... 34
2.9 SCI FIFO Registers (SCIFFTX, SCIFFRX, SCIFFCT) ................................................................ 34
2.10 Priority Control Register (SCIPRI) ....................................................................................... 36
A Revision History ....................................................................................................... 39
SPRUFZ5A – August 2008 – Revised July 2009 Contents 3
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List of Figures
1-1 SCI CPU Interface ......................................................................................................... 12
1-2 Serial Communications Interface (SCI) Module Block Diagram ..................................................... 13
1-3 Typical SCI Data Frame Formats ........................................................................................ 15
1-4 Idle-Line Multiprocessor Communication Format ...................................................................... 17
1-5 Double-Buffered WUT and TXSHF ...................................................................................... 18
1-6 Address-Bit Multiprocessor Communication Format ................................................................... 19
1-7 SCI Asynchronous Communications Format ........................................................................... 20
1-8 SCI RX Signals in Communication Modes .............................................................................. 20
1-9 SCI TX Signals in Communications Mode .............................................................................. 21
1-10 SCI FIFO Interrupt Flags and Enable Logic ............................................................................ 23
2-1 SCI Communication Control Register (SCICCR) — Address 7050h ................................................ 26
2-2 SCI Control Register 1 (SCICTL1) — Address 7051h ................................................................ 28
2-3 Baud-Select MSbyte Register (SCIHBAUD) — Address 7052h ..................................................... 30
2-4 Baud-Select LSbyte Register (SCILBAUD) — Address 7053h ...................................................... 30
2-5 SCI Control Register 2 (SCICTL2) — Address 7054h ................................................................ 30
2-6 SCI Receiver Status Register (SCIRXST) — Address 7055h ........................................................ 31
2-7 Register SCIRXST Bit Associations — Address 7055h ............................................................... 32
2-8 Emulation Data Buffer Register (SCIRXEMU) — Address 7056h ................................................... 33
2-9 SCI Receive Data Buffer Register (SCIRXBUF) — Address 7057h ................................................. 33
2-10 Transmit Data Buffer Register (SCITXBUF) — Address 7059h ..................................................... 34
2-11 SCI FIFO Transmit (SCIFFTX) Register — Address 705Ah ......................................................... 34
2-12 SCI FIFO Receive (SCIFFRX) Register — Address 705Bh .......................................................... 35
2-13 SCI FIFO Control (SCIFFCT) Register — Address 705Ch ........................................................... 36
2-14 SCI Priority Control Register (SCIPRI) — Address 705Fh ........................................................... 37
List of Figures4 SPRUFZ5A – August 2008 – Revised July 2009
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List of Tables
1-1 SCI-A Registers ............................................................................................................ 14
1-2 SCI-B Registers ............................................................................................................ 14
1-3 SCI Module Signal Summary ............................................................................................. 15
1-4 Programming the Data Format Using SCICCR ........................................................................ 16
1-5 Asynchronous Baud Register Values for Common SCI Bit Rates ................................................... 22
1-6 SCI Interrupt Flags ......................................................................................................... 23
2-1 SCIA Registers ............................................................................................................. 26
2-2 SCIB Registers ............................................................................................................. 26
2-3 SCI Communication Control Register (SCICCR) Field Descriptions ................................................ 27
2-4 SCI Control Register 1 (SCICTL1) Field Descriptions ................................................................. 28
2-5 Baud-Select Register Field Descriptions ................................................................................ 30
2-6 SCI Control Register 2 (SCICTL2) Field Descriptions ................................................................. 31
2-7 SCI Receiver Status Register (SCIRXST) Field Descriptions ........................................................ 31
2-8 SCI Receive Data Buffer Register (SCIRXBUF) Field Descriptions ................................................. 33
2-9 Field Descriptions .......................................................................................................... 34
2-10 SCI FIFO Receive (SCIFFRX) Register Field Descriptions .......................................................... 35
2-11 SCI FIFO Control (SCIFFCT) Register Field Descriptions ............................................................ 36
2-12 Field Descriptions .......................................................................................................... 37
A-1 Changes Made in Revision A ............................................................................................. 39
SPRUFZ5A – August 2008 – Revised July 2009 List of Tables 5
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