//###########################################################################
//
// FILE: Example_281xSWPrioritizedDefaultIsr.c
//
// TITLE: DSP281x Device Default Software Prioritized Interrupt Service Routines.
//
// This file is based on the standard Example_28xSWPrioritizedDefaultIsr.c
//
// The ISR routines have been modified slightly to provide a trace
// mechanism used for this example
//
//###########################################################################
//
// Original Author: A.T.
//
// Ver | dd mmm yyyy | Who | Description of changes
// =====|=============|======|===============================================
// 1.00| 11 Sep 2003 | L.H. | Changes since previous version (v.1 Alpha)
// | | | Revision changed to aligned with other headerfiles
// | | | Moved USER0-USER11 to USER1-USER12 to match CPU guide
// -----|-------------|------|-----------------------------------------------
//###########################################################################
#include "DSP281x_Device.h" // DSP281x Headerfile Include File
#include "DSP281x_Examples.h" // DSP281x Examples Include File
// Defined in the Example_28xSWPrioritizedInterrupts.c file
// for this example only
extern Uint16 ISRTrace[50];
extern Uint16 ISRTraceIndex;
// Used for ISR delays
Uint16 i;
//---------------------------------------------------------------------------
// XINT13, TINT2, NMI, XINT1, XINT2 Default ISRs:
//---------------------------------------------------------------------------
//
// Connected to INT13 of CPU (use MINT13 mask):
#if (INT13PL != 0)
interrupt void INT13_ISR(void) // XINT13
{
IER |= MINT13; // Set "global" priority
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
#endif
// Connected to INT14 of CPU (use MINT14 mask):
#if (INT14PL != 0)
interrupt void INT14_ISR(void) // CPU-Timer2
{
IER |= MINT14; // Set "global" priority
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
#endif
// Connected to NMI of CPU (non-maskable):
interrupt void NMI_ISR(void) // Non-maskable interrupt
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
// Connected to PIEIER1_4 (use MINT1 and MG14 masks):
#if (G14PL != 0)
interrupt void XINT1_ISR(void)
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER1.all;
IER |= MINT1; // Set "global" priority
PieCtrlRegs.PIEIER1.all &= MG14; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
asm(" NOP");
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER1.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0014;
ISRTraceIndex++;
}
#endif
// Connected to PIEIER1_5 (use MINT1 and MG15 masks):
#if (G15PL != 0)
interrupt void XINT2_ISR(void)
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER1.all;
IER |= MINT1; // Set "global" priority
PieCtrlRegs.PIEIER1.all &= MG15; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER1.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0015;
ISRTraceIndex++;
}
#endif
//---------------------------------------------------------------------------
// DATALOG, RTOSINT, EMUINT Default ISRs:
//---------------------------------------------------------------------------
//
// Connected to INT15 of CPU (use MINT15 mask):
#if (INT15PL != 0)
interrupt void DATALOG_ISR(void) // Datalogging interrupt
{
IER |= MINT15; // Set "global" priority
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
#endif
// Connected to INT16 of CPU (use MINT16 mask):
#if (INT16PL != 0)
interrupt void RTOSINT_ISR(void) // RTOS interrupt
{
IER |= MINT16; // Set "global" priority
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
#endif
// Connected to EMUINT of CPU (non-maskable):
interrupt void EMUINT_ISR(void) // Emulation interrupt
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
//---------------------------------------------------------------------------
// ILLEGAL Instruction Trap ISR:
//
interrupt void ILLEGAL_ISR(void) // Illegal operation TRAP
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
//---------------------------------------------------------------------------
// USER Traps Default ISRs:
//
interrupt void USER1_ISR(void) // User Defined trap 1
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER2_ISR(void) // User Defined trap 2
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER3_ISR(void) // User Defined trap 3
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER4_ISR(void) // User Defined trap 4
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER5_ISR(void) // User Defined trap 5
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER6_ISR(void) // User Defined trap 6
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER7_ISR(void) // User Defined trap 7
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER8_ISR(void) // User Defined trap 8
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER9_ISR(void) // User Defined trap 9
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER10_ISR(void) // User Defined trap 10
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER11_ISR(void) // User Defined trap 11
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
interrupt void USER12_ISR(void) // User Defined trap 12
{
EINT;
// Insert ISR Code here.......
// Next line for debug only (remove after inserting ISR Code):
ESTOP0;
}
//---------------------------------------------------------------------------
// ADC Default ISR:
//
// Connected to PIEIER1_6 (use MINT1 and MG16 masks):
#if (G16PL != 0)
interrupt void ADCINT_ISR(void) // ADC
{
// Set interrupt priority:
volatile Uint16 TempPI
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DSP281x_examples.rar (62个子文件)
www.pudn.com.txt 218B
DSP281x_examples
mcbsp_loopback_interrupts
Example_281xMcBSP_FFDLB_int.pjt 2KB
Example_281xMcBSP_FFDLB_int.gel 480B
Example_281xMcBSP_FFDLB_int.c 7KB
adc_soc
Example_281xAdcSoc.pjt 2KB
Example_281xAdcSoc.gel 485B
Example_281xAdcSoc.c 6KB
flash
Example_281xFlash.c 14KB
Example_281xFlash.gel 593B
Example_281xFlash.pjt 2KB
ecan_back2back
Example_281xECanBack2Back.c 13KB
Example_281xECanBack2Back.pjt 2KB
Example_281xECanBack2Back.gel 457B
spi_loopback_interrupts
Example_281xSpi_FFDLB_int.pjt 2KB
Example_281xSpi_FFDLB_int.c 7KB
Example_281xSpi_FFDLB_int.gel 462B
cpu_timer
Example_281xCpuTimer.gel 475B
Example_281xCpuTimer.c 4KB
Example_281xCpuTimer.pjt 2KB
sci_loopback
Example_281xSci_FFDLB.c 6KB
Example_281xSci_FFDLB.pjt 2KB
Example_281xSci_FFDLB.gel 502B
ev_timer_period
Example_281xEvTimerPeriod.pjt 2KB
Example_281xEvTimerPeriod.gel 567B
Example_281xEvTimerPeriod.c 10KB
mcbsp_loopback
Example_281xMcBSP_FFDLB.pjt 2KB
Example_281xMcBSP_FFDLB.c 10KB
Example_281xMcBSP_FFDLB.gel 495B
sw_prioritized_interrupts
Example_281xSWPrioritizedDefaultIsr.c 38KB
Example_281xSWPrioritizedInterrupts.pjt 2KB
Example_281xSWPrioritizedInterrupts.c 18KB
Example_281xSWPrioritizedInterrupts.gel 451B
sci_autobaud
Example_281xSci_Autobaud.gel 681B
Example_281xSci_Autobaud.pjt 2KB
Example_281xSci_Autobaud.c 11KB
watchdog
Example_281xWatchdog.pjt 2KB
Example_281xWatchdog.c 5KB
Example_281xWatchdog.gel 421B
gpio_toggle
Example_281xGpioToggle.gel 365B
Example_281xGpioToggle.c 9KB
Example_281xGpioToggle.pjt 2KB
adc_seqmode_test
Example_281xAdcSeqModeTest.pjt 2KB
Example_281xAdcSeqModeTest.c 5KB
Example_281xAdcSeqModeTest.gel 408B
gpio_loopback
Example_281xGpioLoopback.c 17KB
Example_281xGpioLoopback.pjt 2KB
Example_281xGpioLoopback.gel 409B
ev_pwm
Example_281xEvPwm.gel 348B
Example_281xEvPwm.pjt 2KB
Example_281xEvPwm.c 6KB
spi_loopback
Example_281xSpi_FFDLB.pjt 2KB
Example_281xSpi_FFDLB.c 5KB
Example_281xSpi_FFDLB.gel 425B
adc_seq_ovd_test
Example_281xAdcSeq_ovdTest.gel 412B
Example_281xAdcSeq_ovdTest.c 9KB
Example_281xAdcSeq_ovdTest.pjt 2KB
sci_loopback_interrupts
Example_281xSci_FFDLB_int.gel 561B
Example_281xSci_FFDLB_int.pjt 2KB
Example_281xSci_FFDLB_int.c 9KB
run_from_xintf
Example_281xCodeRunFromXintf.pjt 2KB
Example_281xRunFromXintf.gel 3KB
Example_281xCodeRunFromXintf.c 9KB
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