ORISE Technology reserves the right to change this documentation without prior notice. Information provided by ORISE Technology is believed to be
accurate and reliable. However, ORISE Technology makes no warranty for any errors which may appear in this document. Contact ORISE Technology to
obtain the latest version of device specifications before placing your order. No responsibility is assumed by ORISE Technology for any infringement of patent
or other rights of third parties which may result from its use. In addition, ORISE products are not authorized for use as critical components in life support
devices/ systems or aviation devices/systems, where a malfunction or failure of the product may reasonably be expected to result in significant injury to the
user, without the express written approval of ORISE.
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SPFD54126B
© ORISE Technology Co., Ltd.
Proprietary & Confidential
2 NOV. , 2006
Preliminary Version: 0.2
Table of Contents
PAGE
T
ABLE OF CONTENTS .......................................................................................................................................................................................... 2
528-CHANNEL DRIVER WITH SYSTEM-ON-CHIP (SOC) FOR COLOR AMORPHOUS TFT LCD................................................................ 6
1. GENERAL DESCRIPTION.......................................................................................................................................................................... 6
2. FEATURE .................................................................................................................................................................................................... 6
3. ORDERING INFORMATION........................................................................................................................................................................ 6
4. BLOCK DIAGRAM ...................................................................................................................................................................................... 7
4.1. BLOCK FUNCTION ............................................................................................................................................................................. 7
4.1.1. System Interface ....................................................................................................................................................................... 8
4.1.2. External Display Interface ......................................................................................................................................................... 8
4.1.3. Address Counter (AC)............................................................................................................................................................... 8
4.1.4. Graphics RAM (GRAM) ............................................................................................................................................................ 8
4.1.5. Grayscale Voltage Generating Circuit....................................................................................................................................... 8
4.1.6. Timing Controller....................................................................................................................................................................... 8
4.1.7. Oscillator (OSC)........................................................................................................................................................................ 8
4.1.8. Source Driver Circuit................................................................................................................................................................. 8
4.1.9. Gate Driver Circuit .................................................................................................................................................................... 9
4.1.10. LCD Driving Power Supply Circuit........................................................................................................................................ 9
5. SIGNAL DESCRIPTIONS............................................................................................................................................................................ 9
6. INSTRUCTIONS........................................................................................................................................................................................ 14
6.1. OUTLINE ........................................................................................................................................................................................... 14
6.1.1. System Function Command List and Description................................................................................................................... 14
6.1.2. Panel Function Command List and Description...................................................................................................................... 16
6.2. SYSTEM COMMAND DESCRIPTION ........................................................................................................................................................ 20
6.2.1. NOP (00h) ............................................................................................................................................................................... 20
6.2.2. SWRESET (01h): Software Reset .......................................................................................................................................... 21
6.2.3. RDDID (04H): Read Display ID............................................................................................................................................... 22
6.2.4. RDDST (09H): Read Display Status ....................................................................................................................................... 22
6.2.5. RDDPM (0AH): Read Display Power Mode............................................................................................................................ 25
6.2.6. RDDMADCTR (0BH): Read Display MADCTR....................................................................................................................... 26
6.2.7. RDDCOLMOD (0CH): Read Display Pixel Format ................................................................................................................. 27
6.2.8. RDDIM (0DH): Read Display Image Mode ............................................................................................................................. 28
6.2.9. RDDSM (0EH): Read Display Signal Mode ............................................................................................................................ 29
6.2.10. RDDSDR (0FH): Read Display Self-Diagnostic Result ...................................................................................................... 30
6.2.11. SLPIN (10H): Sleep In ............................................................................................................................................................ 31
6.2.12. SLPOUT (11H): Sleep Out ................................................................................................................................................. 33
6.2.13. PTLON (12H): Partial Display Mode On............................................................................................................................. 35
6.2.14. NORON (13H): Normal Display Mode On.......................................................................................................................... 36
6.2.15. INVOFF (20H): Display Inversion Off ................................................................................................................................. 37
6.2.16. INVON (21H): Display Inversion On ................................................................................................................................... 38
6.2.17. GAMSET (26H): Gamma Set ............................................................................................................................................. 39
6.2.18. DISPOFF (28H): Display Off .............................................................................................................................................. 40
6.2.19. DISPON (29H): Display On ................................................................................................................................................ 42
6.2.20. CASET (2AH): Column Address Set .................................................................................................................................. 44
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© ORISE Technology Co., Ltd.
Proprietary & Confidential
3 NOV. , 2006
Preliminary Version: 0.2
6.2.21. RASET (2BH): Row Address Set........................................................................................................................................ 46
6.2.22. RAMWR (2CH): Memory Write........................................................................................................................................... 48
6.2.23. RGBSET (2DH): Colour Setting ......................................................................................................................................... 49
6.2.24. RAMHD (2EH): Memory Read ........................................................................................................................................... 50
6.2.25. PTLAR (30H): Partial Area ................................................................................................................................................. 51
6.2.26. SCRLAR (33H): Scroll Area................................................................................................................................................ 53
6.2.27. TEOFF (34H): Tearing Effect Line OFF.............................................................................................................................. 57
6.2.28. TEON (35H): Tearing Effect Line ON ................................................................................................................................. 58
6.2.29. MADCTR (36H): Memory Data Access Control.................................................................................................................. 59
6.2.30. VSCSAD (37H): Vertical Scroll Start Address of RAM ....................................................................................................... 61
6.2.31. IDMOFF (38H): Idle Mode Off ............................................................................................................................................ 63
6.2.32. IDMON (39H): Idle Mode On .............................................................................................................................................. 64
6.2.33. COLMOD (3AH): Interface Pixel Format ............................................................................................................................ 66
6.2.34. RDID1 (DAH): Read ID1 Value........................................................................................................................................... 67
6.2.35. RDID2 (DBH): Read ID2 Value........................................................................................................................................... 68
6.2.36. RDID3 (DCH): Read ID3 Value .......................................................................................................................................... 69
6.2.37. SRGBOFF (AAH): Separate RGB Gamma OFF................................................................................................................ 70
6.2.38. SRGBOFF (ABH): Separate RGB Gamma ON.................................................................................................................. 71
6.2.39. VSYNCOFF (ACH): VSYNC Interface OFF ....................................................................................................................... 72
6.2.40. VSYNCON (ADH): VSYNC Interface ON........................................................................................................................... 73
6.2.41. VSCTR1 (AEH): VSYNC Interface function control 1......................................................................................................... 74
6.3. PANEL COMMAND DESCRIPTION ........................................................................................................................................................... 75
6.3.1. RGBCTR (B0H): RGB signal control ...................................................................................................................................... 75
6.3.2. FRMCTR1 (B1h): Frame Rate Control (In normal mode/ Full colors)..................................................................................... 76
6.3.3. FRMCTR2 (B2h): Frame Rate Control (In Idle mode/ 8-colors) ............................................................................................. 78
6.3.4. FRMCTR3 (B3h): Frame Rate Control (In Partial mode/ full colors)....................................................................................... 80
6.3.5. INVCTR (B4h): Display Inversion Control............................................................................................................................... 82
6.3.6. RGBBPCTR (B5h): RGB Interface Blanking Porch setting..................................................................................................... 83
6.3.7. DISSET5 (B6h): Display Function set 5.................................................................................................................................. 84
6.3.8. PWCTR1 (C0H): Power Control 1 .......................................................................................................................................... 86
6.3.9. PWCTR2 (C1H): Power Control 2 .......................................................................................................................................... 88
6.3.10. PWCTR3 (C2H): Power Control 3 (in Normal mode/ Full colors)....................................................................................... 89
6.3.11. PWCTR4 (C3H): Power Control 4 (in Idle mode/ 8-colors)..................................................................................................... 91
6.3.12. PWCTR5 (C4H): Power Control 5 (in Partial mode/ full-colors) ......................................................................................... 93
6.3.13. VMCTR1 (C5H): VCOM Control 1...................................................................................................................................... 95
6.3.14. VMCTR2 (C6H): VCOM Control 2...................................................................................................................................... 96
6.3.15. RDVMOF (C8H): Read the VCOM Offset Value NV memory ............................................................................................ 98
6.3.16. WRID2 (D1h): Write ID2 Value ........................................................................................................................................... 99
6.3.17. WRID3 (D2h): Write ID3 Value ......................................................................................................................................... 100
6.3.18. RDID4 (D3h): Read the ID4 value .................................................................................................................................... 101
6.3.19. NVFCTR1 (D9h): NV Memory Function Controller 1 ....................................................................................................... 102
6.3.20. NVFCTR2 (DEh): NV Memory Function Controller 2 ....................................................................................................... 104
6.3.21. NVFCTR3 (DFh): NV Memory Function Controller 3 ....................................................................................................... 105
6.3.22. GMCTRP1 (E0H): Gamma (‘+’polarity) Correction Characteristics Setting ..................................................................... 106
6.3.23. GMCTRN1 (E1H): Gamma (‘-’polarity) Correction Characteristics Setting ...................................................................... 107
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SPFD54126B
© ORISE Technology Co., Ltd.
Proprietary & Confidential
4 NOV. , 2006
Preliminary Version: 0.2
6.3.24. GMCTRP2 (E2H): Gamma (‘+’polarity) Correction Characteristics Setting ..................................................................... 108
6.3.25. GMCTRN2 (E3H): Gamma (‘-’polarity) Correction Characteristics Setting ...................................................................... 109
6.3.26. GMCTRP3 (E4H): Gamma (‘+’polarity) Correction Characteristics Setting ......................................................................110
6.3.27. GMCTRN3 (E5H): Gamma (‘-’polarity) Correction Characteristics Setting .......................................................................111
7. FUNCTION DESCRIPTION..................................................................................................................................................................... 112
7.1. MCU & RGB INTERFACE ................................................................................................................................................................112
7.2. MPU INTERFACE ................................................................................................................................................................................114
7.2.1. Interface Type Selection.........................................................................................................................................................114
7.2.2. 8080-Series Parallel interface(P68=’0’) .................................................................................................................................114
7.2.3. 6800-Series Parallel Interface (P68=’1’) ................................................................................................................................117
7.2.4. Serial Peripheral interface (SPI) ........................................................................................................................................... 120
7.2.5. Data Transfer Break and Recovery....................................................................................................................................... 121
7.2.6. Data Transfer Pause ............................................................................................................................................................. 124
7.2.7. Data Transfer Modes ............................................................................................................................................................ 125
7.3. MCU DATA COLOUR CODING ............................................................................................................................................................. 126
7.3.1. MCU Data Colour Coding for RAM data Write...................................................................................................................... 126
7.3.2. MCU Data Colour Coding for RAM data Read ..................................................................................................................... 137
7.3.3. Serial Interface (IM2 = ‘0’)..................................................................................................................................................... 142
7.4. RGB INTERFACE ............................................................................................................................................................................ 145
7.4.1. General Description .............................................................................................................................................................. 145
7.4.2. General Timing Diagram ....................................................................................................................................................... 146
7.4.3. Updating Order on Display Active Area (Normal Display Mode On + Sleep Out)................................................................. 147
7.4.4. RGB Interface Bus Width set ................................................................................................................................................ 149
7.4.5. RGB Interface Mode Set....................................................................................................................................................... 149
7.4.6. RGB Interface Timing Diagram ............................................................................................................................................. 150
7.4.7. RGB Data Color Coding........................................................................................................................................................ 161
7.5. DISPLAY DATA RAM ....................................................................................................................................................................... 163
7.5.1. Configuration......................................................................................................................................................................... 163
7.5.2. Memory to Display Address Mapping ................................................................................................................................... 165
7.5.3. Normal Display On or Partial Mode On, Vertical Scroll Off ................................................................................................... 168
7.5.4. Vertical Scroll Mode .............................................................................................................................................................. 171
7.5.5. When using 176RGB x 220 resolution (GM1, GM0 = “00”) .................................................................................................. 172
7.5.6. Vertical Scroll Example ......................................................................................................................................................... 173
7.6. ADDRESS COUNTER..................................................................................................................................................................... 173
7.7. MEMORY DATA WRITE/ READ DIRECTION ................................................................................................................................. 174
7.8. TEARING EFFECT OUTPUT LINE ................................................................................................................................................. 177
7.8.1. Tearing Effect Line Modes .................................................................................................................................................... 177
7.8.2. Tearing Effect Line Timings .................................................................................................................................................. 178
7.8.3. Example 1: MPU Write is faster than panel read. ................................................................................................................. 179
7.8.4. Example 2: MPU write is slower than panel read. ................................................................................................................ 180
7.9. PRESET VALUES ........................................................................................................................................................................... 181
7.10. POWER ON/OFF SEQUENCE ....................................................................................................................................................... 181
7.10.1. Case 1 – RESX Line is held High or Unstable by Host at Power On ............................................................................... 181
7.10.2. Case 2 – RESX Line is Held Low by Host at Power On................................................................................................... 182
7.10.3. Uncontrolled Power Off .................................................................................................................................................... 182
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SPFD54126B
© ORISE Technology Co., Ltd.
Proprietary & Confidential
5 NOV. , 2006
Preliminary Version: 0.2
7.11. POWER LEVEL DEFINITION.......................................................................................................................................................... 183
7.11.1. Power Level...................................................................................................................................................................... 183
7.11.2. Power Flow Chart ............................................................................................................................................................. 184
7.12. GAMMA CURVES ........................................................................................................................................................................... 185
7.13. RESET............................................................................................................................................................................................. 186
7.13.1. Reset Value ...................................................................................................................................................................... 186
7.13.2. Module Input/Output Pins................................................................................................................................................. 189
7.13.3. Reset Timing..................................................................................................................................................................... 190
7.14. COLOUR DEPTH CONVERSION LOOK UP TABLES ................................................................................................................... 191
7.14.1. 4096 and 65536 Colour to 262,144 Colour ...................................................................................................................... 191
7.15. SLEEP OUT-COMMAND AND SELF-DIAGNOSTIC FUNCTIONS OF THE DISPLAY MODULE ................................................. 195
7.15.1. Register Loading Detection .............................................................................................................................................. 195
7.15.2. Functionality Detection ..................................................................................................................................................... 196
7.15.3. Chip Attachment Detection............................................................................................................................................... 197
7.15.4. Display Glass Break Detection......................................................................................................................................... 198
7.16. OSCILLATOR .................................................................................................................................................................................. 199
7.17. SYSTEM COLCK GENERATOR..................................................................................................................................................... 199
7.18. INSTRUCTION DECODER AND REGISTER ................................................................................................................................. 199
7.19. SOURCE DRIVER........................................................................................................................................................................... 199
7.20. GATE DRIVER ................................................................................................................................................................................ 199
7.20.1. Gate Driver ....................................................................................................................................................................... 199
7.21. Γ-CORRECTION FUNCTION .......................................................................................................................................................... 200
7.22. VSYNC INTERFACE ....................................................................................................................................................................... 200
8. ELECTRICAL SPECIFICATIONS ........................................................................................................................................................... 204
8.1. DC CHARACTERISTICAC CHARACTERISTIC (VDD=2.6V~3.0V, VDDIO = 1.6V~3.0V, TA = -40℃ ~ 85℃) ........................... 204
8.2. AC TIMING CHARACTERISTICS ................................................................................................................................................... 204
8.2.1. Parallel Interface Characteristics 18, 16 ,9 or 8-bits bus (8080-series MCU) ....................................................................... 204
8.3. PARALLEL INTERFACE CHARACTERISTICS 18, 16 ,9 OR 8-BITS BUS (6800-SERIES MCU).................................................. 207
8.4. SERIAL INTERFACE CHARACTERISTICS (3-PIN SERIAL).......................................................................................................... 208
9. CHIP INFORMATION .............................................................................................................................................................................. 209
9.1. PAD ASSIGNMENT......................................................................................................................................................................... 209
9.2. PAD LOCATIONS............................................................................................................................................................................ 209
9.3. WIRING RESISTANCE ................................................................................................................................................................... 214
10. DISCLAIMER........................................................................................................................................................................................... 216
11. REVISION HISTORY............................................................................................................................................................................... 217
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