017-define-func-2-args.rar_The Test

/* * Copyright (C) 2009-2010 Francisco Jerez. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining * a copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sublicense, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial * portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * */ #include <stdbool.h> #include "main/state.h" #include "nouveau_driver.h" #include "nouveau_context.h" #include "nouveau_fbo.h" #include "nouveau_util.h" #include "nv_object.xml.h" #include "nv10_3d.xml.h" #include "nv04_driver.h" #include "nv10_driver.h" static GLboolean use_fast_zclear(struct gl_context *ctx, GLbitfield buffers) { struct nouveau_context *nctx = to_nouveau_context(ctx); struct gl_framebuffer *fb = ctx->DrawBuffer; if (buffers & BUFFER_BIT_STENCIL) { /* * The stencil test is bypassed when fast Z clears are * enabled. */ nctx->hierz.clear_blocked = GL_TRUE; context_dirty(ctx, ZCLEAR); return GL_FALSE; } return !nctx->hierz.clear_blocked && fb->_Xmax == fb->Width && fb->_Xmin == 0 && fb->_Ymax == fb->Height && fb->_Ymin == 0; } GLboolean nv10_use_viewport_zclear(struct gl_context *ctx) { struct nouveau_context *nctx = to_nouveau_context(ctx); struct gl_framebuffer *fb = ctx->DrawBuffer; struct gl_renderbuffer *depthRb = fb->Attachment[BUFFER_DEPTH].Renderbuffer; return context_chipset(ctx) < 0x17 && !nctx->hierz.clear_blocked && depthRb && (_mesa_get_format_bits(depthRb->Format, GL_DEPTH_BITS) >= 24); } float nv10_transform_depth(struct gl_context *ctx, float z) { struct nouveau_context *nctx = to_nouveau_context(ctx); if (nv10_use_viewport_zclear(ctx)) return 2097152.0 * (z + (nctx->hierz.clear_seq & 7)); else return ctx->DrawBuffer->_DepthMaxF * z; } static void nv10_zclear(struct gl_context *ctx, GLbitfield *buffers) { /* * Pre-nv17 cards don't have native support for fast Z clears, * but in some cases we can still "clear" the Z buffer without * actually blitting to it if we're willing to sacrifice a few * bits of depth precision. * * Each time a clear is requested we modify the viewport * transform in such a way that the old contents of the depth * buffer are clamped to the requested clear value when * they're read by the GPU. */ struct nouveau_context *nctx = to_nouveau_context(ctx); struct gl_framebuffer *fb = ctx->DrawBuffer; struct nouveau_framebuffer *nfb = to_nouveau_framebuffer(fb); struct nouveau_surface *s = &to_nouveau_renderbuffer( fb->Attachment[BUFFER_DEPTH].Renderbuffer)->surface; if (nv10_use_viewport_zclear(ctx)) { int x, y, w, h; float z = ctx->Depth.Clear; uint32_t value = pack_zs_f(s->format, z, 0); get_scissors(fb, &x, &y, &w, &h); *buffers &= ~BUFFER_BIT_DEPTH; if (use_fast_zclear(ctx, *buffers)) { if (nfb->hierz.clear_value != value) { /* Don't fast clear if we're changing * the depth value. */ nfb->hierz.clear_value = value; } else if (z == 0.0) { nctx->hierz.clear_seq++; context_dirty(ctx, ZCLEAR); if ((nctx->hierz.clear_seq & 7) != 0 && nctx->hierz.clear_seq != 1) /* We didn't wrap around -- no need to * clear the depth buffer for real. */ return; } else if (z == 1.0) { nctx->hierz.clear_seq--; context_dirty(ctx, ZCLEAR); if ((nctx->hierz.clear_seq & 7) != 7) /* No wrap around */ return; } } value = pack_zs_f(s->format, (z + (nctx->hierz.clear_seq & 7)) / 8, 0); context_drv(ctx)->surface_fill(ctx, s, ~0, value, x, y, w, h); } } static void nv17_zclear(struct gl_context *ctx, GLbitfield *buffers) { struct nouveau_context *nctx = to_nouveau_context(ctx); struct nouveau_pushbuf *push = context_push(ctx); struct nouveau_framebuffer *nfb = to_nouveau_framebuffer( ctx->DrawBuffer); struct nouveau_surface *s = &to_nouveau_renderbuffer( nfb->base.Attachment[BUFFER_DEPTH].Renderbuffer)->surface; /* Clear the hierarchical depth buffer */ BEGIN_NV04(push, NV17_3D(HIERZ_FILL_VALUE), 1); PUSH_DATA (push, pack_zs_f(s->format, ctx->Depth.Clear, 0)); BEGIN_NV04(push, NV17_3D(HIERZ_BUFFER_CLEAR), 1); PUSH_DATA (push, 1); /* Mark the depth buffer as cleared */ if (use_fast_zclear(ctx, *buffers)) { if (nctx->hierz.clear_seq) *buffers &= ~BUFFER_BIT_DEPTH; nfb->hierz.clear_value = pack_zs_f(s->format, ctx->Depth.Clear, 0); nctx->hierz.clear_seq++; context_dirty(ctx, ZCLEAR); } } static void nv10_clear(struct gl_context *ctx, GLbitfield buffers) { struct nouveau_context *nctx = to_nouveau_context(ctx); struct nouveau_pushbuf *push = context_push(ctx); nouveau_validate_framebuffer(ctx); nouveau_pushbuf_bufctx(push, nctx->hw.bufctx); if (nouveau_pushbuf_validate(push)) { nouveau_pushbuf_bufctx(push, NULL); return; } if ((buffers & BUFFER_BIT_DEPTH) && ctx->Depth.Mask) { if (context_chipset(ctx) >= 0x17) nv17_zclear(ctx, &buffers); else nv10_zclear(ctx, &buffers); /* Emit the zclear state if it's dirty */ _mesa_update_state(ctx); } nouveau_pushbuf_bufctx(push, NULL); nouveau_clear(ctx, buffers); } static void nv10_hwctx_init(struct gl_context *ctx) { struct nouveau_pushbuf *push = context_push(ctx); struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw; struct nv04_fifo *fifo = hw->chan->data; int i; BEGIN_NV04(push, NV01_SUBC(3D, OBJECT), 1); PUSH_DATA (push, hw->eng3d->handle); BEGIN_NV04(push, NV10_3D(DMA_NOTIFY), 1); PUSH_DATA (push, hw->ntfy->handle); BEGIN_NV04(push, NV10_3D(DMA_TEXTURE0), 3); PUSH_DATA (push, fifo->vram); PUSH_DATA (push, fifo->gart); PUSH_DATA (push, fifo->gart); BEGIN_NV04(push, NV10_3D(DMA_COLOR), 2); PUSH_DATA (push, fifo->vram); PUSH_DATA (push, fifo->vram); BEGIN_NV04(push, NV04_GRAPH(3D, NOP), 1); PUSH_DATA (push, 0); BEGIN_NV04(push, NV10_3D(RT_HORIZ), 2); PUSH_DATA (push, 0); PUSH_DATA (push, 0); BEGIN_NV04(push, NV10_3D(VIEWPORT_CLIP_HORIZ(0)), 1); PUSH_DATA (push, 0x7ff << 16 | 0x800); BEGIN_NV04(push, NV10_3D(VIEWPORT_CLIP_VERT(0)), 1); PUSH_DATA (push, 0x7ff << 16 | 0x800); for (i = 1; i < 8; i++) { BEGIN_NV04(push, NV10_3D(VIEWPORT_CLIP_HORIZ(i)), 1); PUSH_DATA (push, 0); BEGIN_NV04(push, NV10_3D(VIEWPORT_CLIP_VERT(i)), 1); PUSH_DATA (push, 0); } BEGIN_NV04(push, SUBC_3D(0x290), 1); PUSH_DATA (push, 0x10 << 16 | 1); BEGIN_NV04(push, SUBC_3D(0x3f4), 1); PUSH_DATA (push, 0); BEGIN_NV04(push, NV04_GRAPH(3D, NOP), 1); PUSH_DATA (push, 0); if (context_chipset(ctx) >= 0x17) { BEGIN_NV04(push, NV17_3D(UNK01AC), 2); PUSH_DATA (push, fifo->vram); PUSH_DATA (push, fifo->vram); BEGIN_NV04(push, SUBC_3D(0xd84), 1); PUSH_DATA (push, 0x3); BEGIN_NV04(push, NV17_3D(COLOR_MASK_ENABLE), 1); PUSH_DATA (push, 1); } if (context_chipset(ctx) >= 0x11) { BEGIN_NV04(push, SUBC_3D(0x120), 3); PUSH_DATA (push, 0); PUSH_DATA (push, 1); PUSH_DATA (push, 2); BEGIN_NV04(push, NV04_GRAPH(3D, NOP), 1); PUSH_DATA (push, 0); } BEGIN_NV04(push, NV04_GRAPH(3D, NOP), 1); PUSH_DATA (push, 0); /* Set state */ BEGIN_NV04(push, NV10_3D(FOG_ENABLE), 1); PUSH_DATA (push, 0); BEGIN_NV04(push, NV