Release Note - ARM Cortex-M0 DesignStart r0p0-00rel0
®
ARM® Cortex™-M0 DesignStart™
r0p0-00rel0
Release Note
4 August 2010
AT510-DC-80001-r0p0-00rel0 © Copyright ARM Limited 2010. All rights reserved. i
Confidential
Release Note - ARM Cortex-M0 DesignStart r0p0-00rel0
AT510-DC-80001-r0p0-00rel0 © Copyright ARM Limited 2010. All rights reserved. ii
Confidential
Release Note - ARM Cortex-M0 DesignStart r0p0-00rel0
© Copyright ARM Limited 2010. All rights reserved.
Proprietary notice
Words and logos marked with ® or ™are registered trademarks or trademarks owned by ARM Limited, except as
otherwise stated below in this proprietary notice. Other brands and names mentioned herein may be the
trademarks of their respective owners.
Neither the whole nor any part of the information contained in, or the product described in, this document may be
adapted or reproduced in any material form except with the prior written permission of the copyright holder.
The product described in this document is subject to continuous developments and improvements. All particulars
of the product and its use contained in this document are given by ARM Limited in good faith. However, all
warranties implied or expressed, including but not limited to implied warranties or merchantability, or fitness for
purpose, are excluded.
This document is intended only to assist the reader in the use of the product. ARM Limited shall not be liable for
any loss or damage arising from the use of any information in this document, or any error or omission in such
information, or any incorrect use of the product.
Document confidentiality status
This document is confidential except disclosure permitted to “Designers”.
Product status
The information in this document is Final.
Web address
http://www.arm.com
Release Note - ARM Cortex-M0 DesignStart r0p0-00rel0
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Confidential
Feedback
ARM limited welcomes feedback on both the product and the documentation.
Feedback on the Cortex-M0 DesignStart processor
Support is not provided with the Cortex-M0 DesignStart processor. However, if you have a question you can post
it on the ARM forums at http://forums.arm.com
.
Feedback on this document
If you have any comments about this document, please send email to errata@arm.com giving:
• The document title
• The document number
• The page number(s) to which your comments refer
• A concise explanation of your comments.
General suggestions for additions and improvements are also welcome.
Release Note - ARM Cortex-M0 DesignStart r0p0-00rel0
AT510-DC-80001-r0p0-00rel0 © Copyright ARM Limited 2010. All rights reserved. iv
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Contents
1 PRODUCT DELIVERABLES 1
1.1 Product Release Status 1
1.2 About the Cortex-M0 DesignStart Processor 1
2 INSTALLATION 2
2.1 Introduction 2
2.1.1 Unpacking the Deliverables 2
3 IMPLEMENTATION AND INTEGRATION 3
3.1 Cortex-M0 DesignStart Processor 3
3.1.1 Overview 3
3.1.2 Port List 6
3.2 Key Integration Tasks 9
3.3 Implementation 9
4 SIMULATION TEST-BENCH 10
4.1 Cortex-M0 DesignStart Test-Bench 10
4.1.1 Overview 10
4.1.2 Debugging 13
5 LIMITATIONS OF THIS RELEASE 14
5.1 Introduction 14
5.1.1 Cortex-M0 DesignStart Processor Configuration 14
5.1.2 Benefits of the Full Cortex-M0 Processor 15
5.2 Migrating to the Full Cortex-M0 Processor 15
6 DOCUMENTATION 16
6.1 Cortex-M0 Technical Publications Documents 16
6.2 ARM Architecture Documents 16
7 REVISION HISTORY 17
Release Note - ARM Cortex-M0 DesignStart r0p0-00rel0
1 PRODUCT DELIVERABLES
1.1 Product Release Status
This is the Full release of the ARM Cortex-M0 DesignStart processor at revision r0p0. These deliverables are
released under the terms of the agreement between ARM and each licensee (the "Agreement"). Use by recipient
of the deliverables is subject to the terms and conditions of the Agreement.
NOTE:
• These deliverables may only be used as described in the terms of your legal agreement.
1.2 About the Cortex-M0 DesignStart Processor
The Cortex-M0 DesignStart processor is a fixed configuration of the Cortex-M0 processor, enabling low cost
access to Cortex-M0 processor technology by offering a subset of the full product.
The Cortex-M0 DesignStart processor is delivered as a pre-configured and obfuscated, but synthesizable, Verilog
version of the full Cortex-M0 processor. As such the Cortex-M0 DesignStart processor is a fully working version of
the Cortex-M0 processor, and can be used as the basis for production hardware and software designs. Details of
the Cortex-M0 processor configuration used to construct the Cortex-M0 DesignStart processor are provided in
section 5.1.1.
The Cortex-M0 processor is a highly deterministic, low gate count, 32-bit processor that implements the ARMv6-M
architecture with zero deviation instruction determinism in zero wait-state memory systems. The Cortex-M0
processor’s three-stage pipeline allows for very low area implementation whilst still being capable of achieving
performance figures around 0.9 DMIPS/MHz. The Cortex-M0 processor’s programmers’ model is fully upwards
compatible with the Cortex-M1, Cortex-M3 and Cortex-M4 processors for portability.
Further details of the Cortex-M0 processor are contained in the Technical Reference Manual (TRM) document
and other technical publications documents, see section 6.1.
AT510-DC-80001-r0p0-00rel0 © Copyright ARM Limited 2010. All rights reserved. 1
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