msm_sdcc.rar_V2

/* * linux/drivers/mmc/host/msm_sdcc.c - Qualcomm MSM 7X00A SDCC Driver * * Copyright (C) 2007 Google Inc, * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved. * Copyright (C) 2009, Code Aurora Forum. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * Based on mmci.c * * Author: San Mehat (san@android.com) * */ #include <linux/module.h> #include <linux/moduleparam.h> #include <linux/init.h> #include <linux/ioport.h> #include <linux/device.h> #include <linux/interrupt.h> #include <linux/delay.h> #include <linux/err.h> #include <linux/highmem.h> #include <linux/log2.h> #include <linux/mmc/host.h> #include <linux/mmc/card.h> #include <linux/mmc/sdio.h> #include <linux/clk.h> #include <linux/scatterlist.h> #include <linux/platform_device.h> #include <linux/dma-mapping.h> #include <linux/debugfs.h> #include <linux/io.h> #include <linux/memory.h> #include <linux/gfp.h> #include <linux/gpio.h> #include <asm/cacheflush.h> #include <asm/div64.h> #include <asm/sizes.h> #include <linux/platform_data/mmc-msm_sdcc.h> #include <mach/dma.h> #include <mach/clk.h> #include "msm_sdcc.h" #define DRIVER_NAME "msm-sdcc" #define BUSCLK_PWRSAVE 1 #define BUSCLK_TIMEOUT (HZ) static unsigned int msmsdcc_fmin = 144000; static unsigned int msmsdcc_fmax = 50000000; static unsigned int msmsdcc_4bit = 1; static unsigned int msmsdcc_pwrsave = 1; static unsigned int msmsdcc_piopoll = 1; static unsigned int msmsdcc_sdioirq; #define PIO_SPINMAX 30 #define CMD_SPINMAX 20 static inline void msmsdcc_disable_clocks(struct msmsdcc_host *host, int deferr) { WARN_ON(!host->clks_on); BUG_ON(host->curr.mrq); if (deferr) { mod_timer(&host->busclk_timer, jiffies + BUSCLK_TIMEOUT); } else { del_timer_sync(&host->busclk_timer); /* Need to check clks_on again in case the busclk * timer fired */ if (host->clks_on) { clk_disable(host->clk); clk_disable(host->pclk); host->clks_on = 0; } } } static inline int msmsdcc_enable_clocks(struct msmsdcc_host *host) { int rc; del_timer_sync(&host->busclk_timer); if (!host->clks_on) { rc = clk_enable(host->pclk); if (rc) return rc; rc = clk_enable(host->clk); if (rc) { clk_disable(host->pclk); return rc; } udelay(1 + ((3 * USEC_PER_SEC) / (host->clk_rate ? host->clk_rate : msmsdcc_fmin))); host->clks_on = 1; } return 0; } static inline unsigned int msmsdcc_readl(struct msmsdcc_host *host, unsigned int reg) { return readl(host->base + reg); } static inline void msmsdcc_writel(struct msmsdcc_host *host, u32 data, unsigned int reg) { writel(data, host->base + reg); /* 3 clk delay required! */ udelay(1 + ((3 * USEC_PER_SEC) / (host->clk_rate ? host->clk_rate : msmsdcc_fmin))); } static void msmsdcc_start_command(struct msmsdcc_host *host, struct mmc_command *cmd, u32 c); static void msmsdcc_reset_and_restore(struct msmsdcc_host *host) { u32 mci_clk = 0; u32 mci_mask0 = 0; int ret = 0; /* Save the controller state */ mci_clk = readl(host->base + MMCICLOCK); mci_mask0 = readl(host->base + MMCIMASK0); /* Reset the controller */ ret = clk_reset(host->clk, CLK_RESET_ASSERT); if (ret) pr_err("%s: Clock assert failed at %u Hz with err %d\n", mmc_hostname(host->mmc), host->clk_rate, ret); ret = clk_reset(host->clk, CLK_RESET_DEASSERT); if (ret) pr_err("%s: Clock deassert failed at %u Hz with err %d\n", mmc_hostname(host->mmc), host->clk_rate, ret); pr_info("%s: Controller has been re-initialiazed\n", mmc_hostname(host->mmc)); /* Restore the contoller state */ writel(host->pwr, host->base + MMCIPOWER); writel(mci_clk, host->base + MMCICLOCK); writel(mci_mask0, host->base + MMCIMASK0); ret = clk_set_rate(host->clk, host->clk_rate); if (ret) pr_err("%s: Failed to set clk rate %u Hz (%d)\n", mmc_hostname(host->mmc), host->clk_rate, ret); } static void msmsdcc_request_end(struct msmsdcc_host *host, struct mmc_request *mrq) { BUG_ON(host->curr.data); host->curr.mrq = NULL; host->curr.cmd = NULL; if (mrq->data) mrq->data->bytes_xfered = host->curr.data_xfered; if (mrq->cmd->error == -ETIMEDOUT) mdelay(5); #if BUSCLK_PWRSAVE msmsdcc_disable_clocks(host, 1); #endif /* * Need to drop the host lock here; mmc_request_done may call * back into the driver... */ spin_unlock(&host->lock); mmc_request_done(host->mmc, mrq); spin_lock(&host->lock); } static void msmsdcc_stop_data(struct msmsdcc_host *host) { host->curr.data = NULL; host->curr.got_dataend = 0; } uint32_t msmsdcc_fifo_addr(struct msmsdcc_host *host) { return host->memres->start + MMCIFIFO; } static inline void msmsdcc_start_command_exec(struct msmsdcc_host *host, u32 arg, u32 c) { msmsdcc_writel(host, arg, MMCIARGUMENT); msmsdcc_writel(host, c, MMCICOMMAND); } static void msmsdcc_dma_exec_func(struct msm_dmov_cmd *cmd) { struct msmsdcc_host *host = (struct msmsdcc_host *)cmd->data; msmsdcc_writel(host, host->cmd_timeout, MMCIDATATIMER); msmsdcc_writel(host, (unsigned int)host->curr.xfer_size, MMCIDATALENGTH); msmsdcc_writel(host, (msmsdcc_readl(host, MMCIMASK0) & (~MCI_IRQ_PIO)) | host->cmd_pio_irqmask, MMCIMASK0); msmsdcc_writel(host, host->cmd_datactrl, MMCIDATACTRL); if (host->cmd_cmd) { msmsdcc_start_command_exec(host, (u32) host->cmd_cmd->arg, (u32) host->cmd_c); } host->dma.active = 1; } static void msmsdcc_dma_complete_tlet(unsigned long data) { struct msmsdcc_host *host = (struct msmsdcc_host *)data; unsigned long flags; struct mmc_request *mrq; struct msm_dmov_errdata err; spin_lock_irqsave(&host->lock, flags); host->dma.active = 0; err = host->dma.err; mrq = host->curr.mrq; BUG_ON(!mrq); WARN_ON(!mrq->data); if (!(host->dma.result & DMOV_RSLT_VALID)) { pr_err("msmsdcc: Invalid DataMover result\n"); goto out; } if (host->dma.result & DMOV_RSLT_DONE) { host->curr.data_xfered = host->curr.xfer_size; } else { /* Error or flush */ if (host->dma.result & DMOV_RSLT_ERROR) pr_err("%s: DMA error (0x%.8x)\n", mmc_hostname(host->mmc), host->dma.result); if (host->dma.result & DMOV_RSLT_FLUSH) pr_err("%s: DMA channel flushed (0x%.8x)\n", mmc_hostname(host->mmc), host->dma.result); pr_err("Flush data: %.8x %.8x %.8x %.8x %.8x %.8x\n", err.flush[0], err.flush[1], err.flush[2], err.flush[3], err.flush[4], err.flush[5]); msmsdcc_reset_and_restore(host); if (!mrq->data->error) mrq->data->error = -EIO; } dma_unmap_sg(mmc_dev(host->mmc), host->dma.sg, host->dma.num_ents, host->dma.dir); host->dma.sg = NULL; host->dma.busy = 0; if (host->curr.got_dataend || mrq->data->error) { /* * If we've already gotten our DATAEND / DATABLKEND * for this request, then complete it through here. */ msmsdcc_stop_data(host); if (!mrq->data->error) host->curr.data_xfered = host->curr.xfer_size; if (!mrq->data->stop || mrq->cmd->error) { host->curr.mrq = NULL; host->curr.cmd = NULL; mrq->data->bytes_xfered = host->curr.data_xfered; spin_unlock_irqrestore(&host->lock, flags); #if BUSCLK_PWRSAVE msmsdcc_disable_clocks(host, 1); #endif mmc_request_done(host->mmc, mrq); return; } else msmsdcc_start_command(host, mrq->data->stop, 0); } out: spin_unlock_irqrestore(&host->lock, flags); return; } static void msmsdcc_dma_complete_func(struct msm_dmov_cmd *cmd, unsigned int result, struct msm_dmov_errdata *err) { struct msmsdcc_dma_data *dma_data = container_of(cmd, struct msmsdcc_dma_data, hdr); struct msmsdcc_host *host = dma_data->host; dma_data->result = result; if (err) memcpy(&dma_data->err, err, sizeof(struct msm_dmov_errdata)); tasklet_schedule(&host->dma_tlet); } static int validate_dma(struct msmsdcc_host *host, struct mmc_data *data) { if (host->dma.channel =