/**********************************************************/
/* Display parameter definitions based on 625/50 format */
/**********************************************************/
#include <std.h>
#include <csl.h>
extern Uint32 SDRAM;
/**********************************************************/
/* Display parameter definitions based on 525/60 format */
/**********************************************************/
/* ................. */
/* Define frame size */
/* ................. */
/* no of pixels per frame line including horizontal blanking*/
/*定义每行的像素数,包括消隐行*/
#define VD_FRM_WIDTH 858
/*定义每帧的行数,包括消隐行*/
#define VD_FRM_HEIGHT 525 /* total noof lines per frame */
/*定义每帧的大小*/
#define VD_FRM_SIZE (VD_FRM_WIDTH * VD_FRM_HEIGHT)
/* ................... */
/* Horizontal blanking */
/* ................... */
/*行消隐出现的像素位置*/
#define VD_HBLNK_START 720 /* starting location of EAV */
/*行消急结束的像素位置*/
#define VD_HBLNK_STOP 856 /* starting location of SAV */
/*消隐的像素数*/
#define VD_HBLNK_SIZE (VD_HBLNK_STOP - VD_HBLNK_START +2/*EAV*/) /* (138) EAV, SAV inclusive */
/* ............................ */
/* Vertical blanking for field1 */
/* ............................ */
/*奇场的场消隐设置*/
#define VD_VBLNK_XSTART1 720 /* pixel on which VBLNK active */
/* edge occurs for field1 */
#define VD_VBLNK_YSTART1 1 /* line on which VBLNK active */
/* edge occurs for field1 */
#define VD_VBLNK_XSTOP1 720 /* pixel on which VBLNK inactive */
/* edge occurs for field1 */
#define VD_VBLNK_YSTOP1 20 /* line on which VBLNK inactive */
/* edge occurs for field1 */
/* ............................ */
/* Vertical blanking for field2 */
/* ............................ */
/*偶场的场消隐设置*/
#define VD_VBLNK_XSTART2 360 /* pixel on which VBLNK active */
/* edge occurs for field2 */
#define VD_VBLNK_YSTART2 263 /* line on which VBLNK active */
/* edge occurs for field2 */
#define VD_VBLNK_XSTOP2 360 /* pixel on which VBLNK inactive */
/* edge occurs for field2 */
#define VD_VBLNK_YSTOP2 283 /* line on which VBLNK inactive */
/* edge occurs for field2 */
/* ................................................. */
/* Define vertical blanking bit(VD_VBITn) reg values */
/* ................................................. */
/*第一场重直消隐设置与清除的所在的行数*/
/* first line with an EAV with V=1 indicating the start of Field1 vertical blanking */
#define VD_VBIT_SET1 1
/* first line with an EAV with V=0 indicating the start of Field1 active display*/
#define VD_VBIT_CLR1 20
#define VD_VBLNK1_SIZE (VD_VBIT_CLR1 - VD_VBIT_SET1) /* 19 lines */
/*第二场重直消隐设置与清除的所在的行数*/
/* first line with an EAV with V=1 indicating the start of Field2 vertical blanking*/
#define VD_VBIT_SET2 264
/* first line with an EAV with V=0 indicating the start of Field2 active display*/
#define VD_VBIT_CLR2 283
#define VD_VBLNK2_SIZE (VD_VBIT_CLR2 - VD_VBIT_SET2) /* 19 lines */
/* ............ */
/* Field timing */
/* ............ */
/* pixel on the first line of Field1 on which FLD ouput is de-asserted*/
#define VD_FIELD1_XSTART 720
/* line on which FLD is de-asserted */
#define VD_FIELD1_YSTART 1
/* pixel on the first line of Field1 on which FLD ouput is asserted */
#define VD_FIELD2_XSTART 360
/* line on which FLD is asserted */
#define VD_FIELD2_YSTART 263
/* .................................... */
/* Define field bit(VD_FBIT) reg values */
/* .................................... */
#define VD_FBIT_CLR 4 /* first line with an EAV with F=0 indicating Field 1 display*/
#define VD_FBIT_SET 266 /* first line with an EAV with F=1 indicating Field 2 display*/
/* ................................ */
/* Define horzontal synchronization */
/* ................................ */
#define VD_HSYNC_START 736
#define VD_HSYNC_STOP 800
/* .......................................... */
/* Define vertical synchronization for field1 */
/* .......................................... */
#define VD_VSYNC_XSTART1 720
#define VD_VSYNC_YSTART1 4
#define VD_VSYNC_XSTOP1 720
#define VD_VSYNC_YSTOP1 7
/* .......................................... */
/* Define vertical synchronization for field2 */
/* .......................................... */
#define VD_VSYNC_XSTART2 360
#define VD_VSYNC_YSTART2 266
#define VD_VSYNC_XSTOP2 360
#define VD_VSYNC_YSTOP2 269
/* ........................................ */
/* Define image offsets for both the fields */
/* which are zero in this example */
/* ........................................ */
#define VD_IMG_HOFF1 0
#define VD_IMG_VOFF1 0
#define VD_IMG_HOFF2 0
#define VD_IMG_VOFF2 0
/* ................................................. */
/* Define image active vertical and horizontal sizes */
/* ................................................. */
#define VD_IMG_HSIZE1 720 /* field1 horizontal image size */
#define VD_IMG_VSIZE1 244 /* field1 vertical image size */
#define VD_IMG_HSIZE2 720 /* field2 horizontal image size */
#define VD_IMG_VSIZE2 243 /* field2 vertical image size */
/* Manipulate field1 and field2 image sizes */
#define VD_IMAGE_SIZE1 (VD_IMG_HSIZE1 * VD_IMG_VSIZE1)
#define VD_IMAGE_SIZE2 (VD_IMG_HSIZE2 * VD_IMG_VSIZE2)
/* Define threshold values in double-words. Both fields should */
/* have same threshold value */
#define VD_VDTHRLD1 (VD_IMG_HSIZE1/8) /* line length in */
#define VD_VDTHRLD2 VD_VDTHRLD1 /* double-words */
/* Define number of events to be generated for field1 and field2 */
#define VD_DISPEVT1 (VD_IMAGE_SIZE1 / (VD_VDTHRLD1 * 8))
#define VD_DISPEVT2 (VD_IMAGE_SIZE2 / (VD_VDTHRLD2 * 8))
#define DISPLAY_FRAME_COUNT 1 /* in this example */
/* ............................................ */
/* EDMA parameters for display Y event that are */
/* specific to this example. */
/* ............................................ */
/* VD_VDTHRLDn is in double-words and 32-bit element size */
#define VD_Y_EDMA_ELECNT (VD_VDTHRLD1 * 2)
#define VD_Y_EDMA_FRMCNT ((VD_DISPEVT1 + VD_DISPEVT2) * DISPLAY_FRAME_COUNT)
/******************************************************************/
/* Description : 8.bit BT.656 non.continuous frame display */
/* */
/* Some important field descriptions: */
/* */
/* DMODE = 000, 8.bit BT.656 mode */
/* CON = 0 */
/* FRAME = 1, display frame */
/* DF2 = 0 */
/* DF1 = 0, (8.bit non.continuous frame display) */
/* SCALE = 0, no scaling */
/* RESMPL = 0, no resampling */
/* DPK = X, not used in 8.bit display */
/* RSYNC = X, used in Raw mode(Enable second synchronized raw */
/* data channel) */
/* RGBX = X, used in Raw mode(RGB extract enable. Perform */
/* 3/4 FIFO unpacking) */
/* VCTL1S = 00, output HSYNC */
/* VCTL2S = 00, output VSYNC */
/* VCTL3S = 0, output CBLNK */
/* HXS = 0, VCTL1 is an output */
/* VXS = 0, VCTL2 is an output */
/* FXS = 0, VCTL3 is an output */
/* PVPSYN = 0, no previous port synchronization */
#include <vportdis.h>
#include "vportcap.h"
/*................................................................ */
/* global variable declarations */
/* ............................................................... */
// Uint32 disChaAYSpace = 0x80000000;
// Uint32 disChaACbSpace = 0x800675c0;
// Uint32 disChaACrSpace = 0x8009b0a0;
#pragma DATA_SECTION(disChaAYSpace, ".disChaAYSpace")
/* buffer to store captured Y-data */
Uint8 disChaAYSpace[720*588];
#pragma DATA_SECTION(disChaACbSpace, ".disChaACbSpace")
/* buffer to store
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zhongzhilvbo.zip_visual c
共62个文件
h:11个
c:11个
obj:10个
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zhongzhilvbo.zip (62个子文件)
zhongzhilvbo
cdb2tcf.bat 707B
video_out.tco 316B
VMD642_video_out0.pjt.bak 2KB
vmd642_video.cmd 1KB
video_out.tcf 6KB
VMD642_video_out0.sbl 90KB
include
_tvp51xx.h 7KB
tvp51xx.h 2KB
iic.h 839B
vport.h 7KB
vportcap.h 3KB
vportdis.h 3KB
sa7121h.h 776B
evmdm642_vcapparams.h 613B
evmdm642_vdisparams.h 510B
Debug.lkf 837B
video_outcfg.s62 36KB
VMD642_video_out0.pjt 2KB
VMD642_video_out0.paf2 14KB
video_outcfg.cmd 8KB
tcfopts.dat 107B
src
boot.asm 3KB
vportcap.c 20KB
vportdis.c 24KB
vportdis.c.bak 21KB
vportcapb.c 17KB
iic.c 5KB
_sa7121h.asm 822KB
dm642main.c 12KB
vmd642_cpld.c 1KB
_sa7121h.c 2KB
_tvp51xx.c 3KB
vportdisN.c 21KB
vportdis-BAK.c 21KB
vmd642.h 1KB
video_out.tcf.a02796 5KB
video_out.cdb 359KB
cdb2tcf.log 1KB
VMD642_video_out0.CS_
SYMBOL.DBF 670KB
FILE.CDX 3KB
FILE.FPT 3KB
FILE.DBF 2KB
SYMBOL.FPT 1.29MB
SYMBOL.CDX 803KB
Debug
_sa7121h.nfo 20KB
vmd642_cpld.obj 8KB
VMD642_video_out0.map 67KB
vportcap.obj 22KB
boot.obj 2KB
_tvp51xx.obj 14KB
video_outcfg.obj 38KB
_sa7121h.obj 101KB
iic.obj 14KB
vportdis.obj 23KB
VMD642_video_out0.out 284KB
dm642main.obj 60KB
video_outcfg_c.obj 11KB
video_out.cdb.Fri_Mar_25_16.25.34_2011 1016KB
video_outcfg.h 642B
cc_build_Debug.log 134B
video_outcfg_c.c 284B
video_outcfg.h62 5KB
共 62 条
- 1
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