Release 13.1 - par O.40d (nt)
Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved.
Thu Nov 08 13:48:37 2012
INFO: The IO information is provided in three file formats as part of the Place and Route (PAR) process. These formats are:
1. The <design name>_pad.txt file (this file) designed to provide information on IO usage in a human readable ASCII text format viewable through common text editors.
2. The <design namd>_pad.csv file for use with spreadsheet programs such as MS Excel. This file can also be read by PACE to communicate post PAR IO information.
3. The <design name>.pad file designed for parsing by customers. It uses the "|" as a data field separator.
INPUT FILE: rng_map.ncd
OUTPUT FILE: rng_pad.txt
PART TYPE: xc6slx16
SPEED GRADE: -3
PACKAGE: csg324
Pinout by Pin Number:
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|Pin Number|Signal Name |Pin Usage|Pin Name |Direction|IO Standard|IO Bank Number|Drive (mA)|Slew Rate|Termination|IOB Delay|Voltage |Constraint|IO Register|Signal Integrity|
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|A1 | | |GND | | | | | | | | | | | |
|A2 |seed_i<3> |IOB |IO_L2N_0 |INPUT |LVCMOS25* |0 | | | |NONE | |UNLOCATED |NO |NONE |
|A3 |seed_i<7> |IOB |IO_L4N_0 |INPUT |LVCMOS25* |0 | | | |NONE | |UNLOCATED |NO |NONE |
|A4 |seed_i<9> |IOB |IO_L5N_0 |INPUT |LVCMOS25* |0 | | | |NONE | |UNLOCATED |NO |NONE |
|A5 |seed_i<11> |IOB |IO_L6N_0 |INPUT |LVCMOS25* |0 | | | |NONE | |UNLOCATED |NO |NONE |
|A6 |seed_i<15> |IOB |IO_L8N_VREF_0 |INPUT |LVCMOS25* |0 | | | |NONE | |UNLOCATED |NO |NONE |
|A7 |seed_i<19> |IOB |IO_L10N_0 |INPUT |LVCMOS25* |0 | | | |NONE | |UNLOCATED |NO |NONE |
|A8 |seed_i<29> |IOB |IO_L33N_0 |INPUT |LVCMOS25* |0 | | | |NONE | |UNLOCATED |NO |NONE |
|A9 |seed_i<25> |IOB |IO_L35N_GCLK16_0 |INPUT |LVCMOS25* |0 | | | |NONE | |UNLOCATED |NO |NONE |
|A10 |number_o<1> |IOB |IO_L37N_GCLK12_0 |OUTPUT |LVCMOS25* |0 |12 | | | | |UNLOCATED |NO |NONE |
|A11 |number_o<5> |IOB |IO_L39N_0 |OUTPUT |LVCMOS25* |0 |12 | | | | |UNLOCATED |NO |NONE |
|A12 |number_o<9> |IOB |IO_L41N_0 |OUTPUT |LVCMOS25* |0 |12 | | | | |UNLOCATED |NO |NONE |
|A13 |number_o<15>|IOB |IO_L50N_0 |OUTPUT |LVCMOS25* |0 |12 | | | | |UNLOCATED |NO |NONE |
|A14 |number_o<19>|IOB |IO_L62N_VREF_0 |OUTPUT |LVCMOS25* |0 |12 | | | | |UNLOCATED |NO |NONE |
|A15 |number_o<23>|IOB |IO_L64N_SCP4_0 |OUTPUT |LVCMOS25* |0 |12 | | | | |UNLOCATED |NO |NONE |
|A16 |number_o<27>|IOB |IO_L66N_SCP0_0 |OUTPUT |LVCMOS25* |0 |12 | | | | |UNLOCATED |NO |NONE |
|A17 | | |TCK | | | | | | | | | | | |
|A18 | | |GND | | | | | | | | | | | |
|B1 | | |VCCAUX | | | | | | | |2.5 | | | |
|B2 |seed_i<2> |IOB |IO_L2P_0 |INPUT |LVCMOS25* |0 | | | |NONE | |UNLOCATED |NO |NONE |
|B3 |seed_i<6> |IOB |IO_L4P_0 |INPUT |LVCMOS25* |0 | | | |NONE | |UNLOCATED |NO |NONE |
|B4 |seed_i<8> |IOB |IO_L5P_0 |INPUT |LVCMOS25* |0 | | | |NONE | |UNLOCATED |NO |NONE |
|B5 | | |VCCO_0 | | |0 | | | | |2.50 | | | |
|B6 |seed_i<14> |IOB |IO_L8P_0 |INPUT |LVCMOS25* |0 | | | |NONE | |UNLOCATED |NO |NONE |
|B7 | | |GND | | | | | | | | | | | |
|B8 |seed_i<28> |IOB |IO_L33P_0 |INPUT |LVCMOS25* |0 | | | |NONE | |UNLOCATED |NO |NONE |
|B9 |seed_i<24> |IOB |IO_L35P_GCLK17_0 |INPUT |LVCMOS25* |0 | | | |NONE | |UNLOCATED |NO |NONE |
|B10 | | |VCCO_0 | | |0 | | | | |2.50 | | | |
|B11 |number_o<4> |IOB |IO_L39P_0 |OUTPUT |LVCMOS25* |0 |12 | | | | |UNLOCATED |NO |NONE |
|B12 |number_o<8> |IOB |IO_L41P_0 |OUTPUT |LVCMOS25* |0 |12 | | | | |UNLOCATED |NO |NONE |
|B13 | | |GND | | | | | | | | | | | |
|B14 |number_o<18>|IOB |IO_L62P_0 |OUTPUT |LVCMOS25* |0 |12 | | | | |UNLOCATED |NO |NONE |
|B15 | | |VCCO_0 | | |0 | | | | |2.50 | | | |
|B16 |number_o<26>|IOB |IO_L66P_SCP1_0 |OUTPUT |LVCMOS25* |0 |12
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