demo.tar.gz_Bootloader_DEMO

#include "s3c6410_addr.h" #include "utils.h" #include "soc_cfg.h" #define rGPKCON0 (*(volatile unsigned *)(0x7F008800)) #define rGPKCON1 (*(volatile unsigned *)(0x7F008804)) #define rGPKDAT (*(volatile unsigned *)(0x7F008808)) #define rGPKPUD (*(volatile unsigned *)(0x7F00880C)) void Port_Init(void) { rGPKCON0 = (rGPKCON0 & ~(0xffffU<<16))|(0x1111U<<16);/*cpk4-7 hig16->0 |0 out put */ rGPKPUD = (rGPKPUD & ~(0xffU << 8))|(0x00U<<8); } void Led_Display(int data) { rGPKDAT = (rGPKDAT & ~(0xf<<4)) | ((data & 0xf)<<4); } static void Delay(void) { volatile int i; for(i=0 ; i < 1000 ; i++) { } } void Uart_Init(void) { // UART I/O port initialize (RXD0 : GPA0, TXD0: GPA1) rGPACON = (rGPACON & ~(0xff<<0)) | (0x22<<0); // GPA0->RXD0, GPA1->TXD0 rGPAPUD = (rGPAPUD & ~(0xf<<0)) | (0x1<<0); // RXD0: Pull-down, TXD0: pull up/down disable // Initialize UART Ch0 rULCON0 = (0<<6)|(0<<3)|(0<<2)|(3<<0); // Normal Mode, No Parity, 1 Stop Bit, 8 Bit Data rUCON0 = (0<<10)|(1<<9)|(1<<8)|(0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0); // PCLK divide, Polling Mode rUFCON0 = (0<<6)|(0<<4)|(0<<2)|(0<<1)|(0<<0); // Disable FIFO rUMCON0 = (0<<5)|(0<<4)|(0<<0); // Disable Auto Flow Control rUBRDIV0 = 35; // Baud rate rUDIVSLOT0 = 0x80;//aSlotTable[DivSlot]; } void Uart_SendByte(int data) { while(!(rUTRSTAT0 & 0x2)); //Wait until THR is empty. Delay(); WrUTXH0(data); } void Uart_SendString(char *pt) { while(*pt) Uart_SendByte(*pt++); } /*********************时钟初始化*************************/ #define OTHERS (*(volatile unsigned long*)0x7E00F900) #define CLK_DIV0 (*(volatile unsigned long*)0x7E00F020) #define APLL_LOCK (*(volatile unsigned long*)0x7E00F000) #define MPLL_LOCK (*(volatile unsigned long*)0x7E00F004) #define APLL_CON (*(volatile unsigned long*)0x7E00F00C) #define MPLL_CON (*(volatile unsigned long*)0x7E00F010) #define MISC_CON (*(volatile unsigned long*)0x7E00F838) #define CLK_SRC (*(volatile unsigned long*)0x7E00F01C) //[3:0]ARMCLK=DOUTAPLL/(ARM_RATIO+1) #define ARM_RATIO 0 //ARMCLK=DOUTAPLL=FOUTAPLL=MOUTAPLL=532M //[4]DOUTMPLL=MOUTMPLL/(MPLL_RATIO+1) #define MPLL_RATIO 0 //MOUTMPLL=FOUTMPLL=532M //[11:9]HCLKX2=HCLKX2IN/(HCLKX2_RATIO+1) #define HCLKX2_RATIO 1 //HCLKX2=266M //[8]HCLK=HCLKX2/(HCLK_RATIO+1) #define HCLK_RATIO 1 //HCLK=133M //[15:12]PCLK=HCLKX2/(PCLK_RATIO+1) #define PCLK_RATIO 3 //PCLK=266/4=66.5M void clock_init(){ APLL_LOCK = 0x0000FFFF; MPLL_LOCK = 0x0000FFFF; OTHERS &= ~0xC0; while((OTHERS&0xF00) != 0); CLK_DIV0 = (ARM_RATIO)|(MPLL_RATIO<<4)|(HCLK_RATIO<<8) |(HCLKX2_RATIO<<9)|(PCLK_RATIO<<12); APLL_CON = ((1<<31) | (266 << 16) | (3 << 8) | (1)); MPLL_CON = ((1<<31) | (266 << 16) | (3 << 8) | (1)); CLK_SRC |= 3; } /********************UART初始化****************/ #define GPACON *((volatile unsigned long*)0x7F008000) #define ULCON0 *((volatile unsigned long*)0x7F005000) #define UCON0 *((volatile unsigned long*)0x7F005004) #define UFCON0 *((volatile unsigned long*)0x7F005008) #define UBRDIV0 *((volatile unsigned long*)0x7F005028) #define UDIVSLOT0 *((volatile unsigned long*)0x7F00502C) void uart_init(){ GPACON &= ~0xff; GPACON |= 0x22; ULCON0 = 0x3; //8n1 UCON0 = 0x5; // UFCON0 = 0x1; /* * DIV_VAL = UBRDIVn + (num of 1’s in UDIVSLOTn)/16 * DIV_VAL = (PCLK / (bps x 16))− 1 * DIV_VAL = (EXT_UCLK0 / (bps x 16 )) − 1 * DIV_VAL = (EXT_UCLK1 / (bps x 16 )) − 1 * PCLK = 66.5M * DIV_VAL = (66.5*10^6)/(115200*16)-1 = 35.08 * UBRDIVn = 35 * num of 1' s in UDIVSLOTn = 0.08 * 16 = 1.28 = 1 * UDIVSLOTn = 0x1 or 0x10 or 0x100 ... */ UBRDIV0 = 35; UDIVSLOT0 = 1; } #define UFSTAT0 *((volatile unsigned long*)0x7F005018) #define URXH0 *((volatile unsigned long*)0x7F005024) char uart_getchar(){ while((UFSTAT0&0x7F) == 0); return URXH0; } #define UTXH0 *((volatile unsigned long*)0x7F005020) void uart_putchar(char c){ while(UFSTAT0&(1<<14)); UTXH0 = c; } /********************DDR******************************/ #define P1MEMCSTAT *((volatile unsigned long*)0x7E001000) #define P1MEMCCMD *((volatile unsigned long*)0x7E001004) #define P1DIRECTCMD *((volatile unsigned long*)0x7E001008) #define P1MEMCFG *((volatile unsigned long*)0x7E00100C) #define P1REFRESH *((volatile unsigned long*)0x7E001010) #define P1CASLAT *((volatile unsigned long*)0x7E001014) #define P1T_DQSS *((volatile unsigned long*)0x7E001018) #define P1T_MRD *((volatile unsigned long*)0x7E00101C) #define P1T_RAS *((volatile unsigned long*)0x7E001020) #define P1T_RC *((volatile unsigned long*)0x7E001024) #define P1T_RCD *((volatile unsigned long*)0x7E001028) #define P1T_RFC *((volatile unsigned long*)0x7E00102C) #define P1T_RP *((volatile unsigned long*)0x7E001030) #define P1T_RRD *((volatile unsigned long*)0x7E001034) #define P1T_WR *((volatile unsigned long*)0x7E001038) #define P1T_WTR *((volatile unsigned long*)0x7E00103C) #define P1T_XP *((volatile unsigned long*)0x7E001040) #define P1T_XSR *((volatile unsigned long*)0x7E001044) #define P1T_ESR *((volatile unsigned long*)0x7E001048) #define P1MEMCFG2 *((volatile unsigned long*)0x7E00104C) #define P1_chip_0_cfg *((volatile unsigned long*)0x7E001200) #define MEM_SYS_CFG *((volatile unsigned long*)0x7E00F120) #define nstoclk(x) (x/(1000/133)+1) void ddr_init(){ unsigned long temp; //设置进入配置状态 P1MEMCCMD = 0x4;//设置Confgure命令 while(P1MEMCSTAT&0x3);//等待进入Configure状态 //设置各项时间参数，注释后面为韦东山老师设置的参数 /* * [2:0]Column address: 10bits * [5:3]Row address:14bits; * [6]APbit:0 */ P1MEMCFG &= ~((7)|(7<<3)|(1<<6)|(7<<15)); P1MEMCFG |= (0x2)|(0x3<<3)|(0x2<<15); P1REFRESH = nstoclk(7800); P1CASLAT = 3<<1; P1T_DQSS = 1;//0.75~1.25 P1T_MRD = 2; //>=2 P1T_RAS = nstoclk(45);//40 P1T_RC = nstoclk(68);//60 temp = nstoclk(23); P1T_RCD = temp|((temp-3)<<3);//20 temp = nstoclk(80); P1T_RFC = temp|((temp-3)<<5);// temp = nstoclk(23);//18 P1T_RP = temp|((temp-3)<<3); P1T_RRD = nstoclk(15);//12 P1T_WR = nstoclk(15);//12 //这四个参数在手册中无法找到 //我的理解是该DDR不需要一下几项延时 //注释后面的数字是韦东山老师设置的参数 P1T_WTR = 7; P1T_XP = 2; P1T_XSR = nstoclk(120); P1T_ESR = nstoclk(120); P1MEMCFG2 &= (0xF)|(3<<6)|(7<<8)|(3<<11); P1MEMCFG2 |= (0x5)|(1<<6)|(3<<8)|(1<<11); P1_chip_0_cfg |= 1<<16; //初始化序列 P1DIRECTCMD = 0xc0000; // NOP P1DIRECTCMD = 0x000; // precharge P1DIRECTCMD = 0x40000;// auto refresh P1DIRECTCMD = 0x40000;// auto refresh P1DIRECTCMD = 0xa0000; // EMRS P1DIRECTCMD = 0x80032; // MRS MEM_SYS_CFG = 0; //设置DRAMC进入Ready状态 P1MEMCCMD = 0; while((P1MEMCSTAT&0x3) != 1); } void clear_bss(unsigned long begin, unsigned long length){ unsigned long* dst = (unsigned long*)begin; unsigned long count = (length+3)/4; while(count--){ *dst++ = 0; } }