USB.rar_2440_USB windows ce_WINCE 4.2_s3c2440_wince

/** THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A PARTICULAR PURPOSE. Copyright (c) 2001. Samsung Electronics, co. ltd All rights reserved. Module Name: Abstract: S3C2440 USB function(ACTIVE SYNC) device driver (Chip Layer) rev: 2003.3.18 : EP3 is replaced by EP4 for DMA operation because DMA2(EP3) is used by audio. (purnnamu) 2003.3.17 : Every USBD interrupt is followed by the dummy interrupt because USBD sub-pending interrupt is cleared after clearing INTPND register. So,USBD sub-pending bit is cleared before clearing INTPND register. (purnnamu) 2002.5.7 : Add to s3c2410_code (Seung-han, Lim) 2002.1.22 : First release/no error recovery (kwangyoon LEE, kwangyoon@samsung.com) Notes: */ #include <windows.h> #include <types.h> #include <ceddk.h> #include <memory.h> #include <serhw.h> #include <nkintr.h> #include "S2440.h" #include <SC2440_usb_hw.h> #include <SC2440_usb_ser.h> #undef ZONE_INIT #include <serdbg.h> #include <drv_glob.h> //:-) #include <2440usb.h> //:-) #define USBDMSG DEBUGMSG //RETAILMSG PDRIVER_GLOBALS v_pDriverGlobals=NULL; //:-) volatile USBD_GLOBALS *usbdShMem=NULL; //:-) volatile DMAreg *v_pDMAregs=NULL; //:-) volatile INTreg *v_pINTregs=NULL; //:-) ULONG realPhysicalAddr_UsbdRxBuf=0; ULONG totalRxCnt=0; //debug /* #if (USBD_GLOBALS_BUF_SIZE!=0x4000) STOP_COMPILE GEN_ERROR //drv_glob.h should be changed correctly #endif */ // This driver defines a simple BULK FIFO device. It supports only one // interface with one alternate setting, as shown below. // // Endpoint Setting 0 //------------------------ // EP0 Control // EP1 In Bulk // EP3 Out Bulk // Steal the useless IR zone from MDD and use it as EP0 & USB specific stuff #define ZONE_USB ZONE_IR // Define the configuration descriptor length #define CFGLEN 32 #define iCONF 18 #define TLEN (CFGLEN + 18) // Define the configuration descriptor itself const BYTE uStd[TLEN]= { 0x12, // 0 desc size DEVICE, // 1 desc type (DEVICE) 0x00, // 2 USB release 0x01, // 3 => 1.00 0xff, // 4 class 0xff, // 5 subclass 0xff, // 6 protocol EP0_MAXP_SIZE, // 7 max pack size 0x47, // 8 vendor ID LSB (Samsung Semi) 0x05, // 9 vendor ID MSB ( 0x1419 ) 0x20, // 10 product ID LSB 0x27, // 11 product ID MSB 0x00, // 12 device release LSB 0x00, // 13 device release MSB 0x00, // 14 manufacturer string desc index 0x00, // 15 product string desc index 0x00, // 16 serial num string desc index 0x01, // 17 num of possible configurations // Configuration Descriptor 0x09, // desc size CONFIGURATION, // desc type (CONFIGURATION) CFGLEN%256, // total length of data returned LSB CFGLEN/256, // total length of data returned MSB 0x01, // num of interfaces 0x01, // value to select config (1 for now) 0x00, // index of string desc ( 0 for now) 0x80, // bus powered 25, // max power, 50mA for now // Interface Decriptor 0x09, // desc size INTERFACE, // desc type (INTERFACE) 0x00, // interface index. 0x00, // value for alternate setting 0x02, // bNumEndpoints (number endpoints used, excluding EP0) 0xff, 0xff, 0xff, 0x00, // string index, // Endpoint descriptor (EP 1 Bulk IN) 0x07, // desc size ENDPOINT, // desc type (ENDPOINT) 0x81, // endpoint address: endpoint 1, IN 0x02, // endpoint attributes: Bulk EP1_IN_MAXP_SIZE, // max packet size LSB 0x00, // max packet size MSB 0x00, // polling interval (4ms/bit=time,500ms) #if 0 // Endpoint descriptor (EP 2 Interrupt IN) 0x07, // desc size ENDPOINT, // desc type (ENDPOINT) 0x82, // endpoint address: endpoint 2, IN 0x03, // endpoint attributes: Interrupt EP2_IN_MAXP_SIZE, // max packet size LSB 0x00, // max packet size MSB 0xFA, // polling interval (4ms/bit=time,100ms) #endif // Endpoint descriptor (EP 4 Bulk OUT) 0x07, // desc size ENDPOINT, // desc type (ENDPOINT) 0x04, // endpoint address: endpoint 4, OUT 0x02, // endpoint attributes: Bulk EP4_OUT_MAXP_SIZE, // max packet size LSB 0x00, // max packet size MSB 0x00 // polling interval (4ms/bit=time,500ms) #if 0 // Endpoint descriptor (EP 4 Interrupt OUT) 0x07, // desc size ENDPOINT, // desc type (ENDPOINT) 0x04, // endpoint address: endpoint 4, OUT 0x03, // endpoint attributes: Interrupt EP4_OUT_MAXP_SIZE, // max packet size LSB 0x00, // max packet size MSB 0x00 // polling interval (4ms/bit=time,500ms) // $$$$ #endif }; // Register writes need to be verified. This macro loops the write until // the effects are visible and records the number of retries. #define UDC_REG_WRITE(_struct,_ptr,_field,_val) IOW_REG_FIELD(_struct,_ptr,_field,_val) #define UDC_REG_BITSET(_struct,_ptr,_field,_val) { _struct xx; \ *(unsigned int *)&xx = 0; \ xx._field = _val; \ IOW_REG_SET(_struct,_ptr,*(unsigned int*)&xx); } #define UDC_REG_WRITEX(_setptr,_setval) (_setptr) = _setval; // Variables for EP0 resend control. Keep track of last packet sent. static char *sendPacket; static int sendPacketLength; static int sendTotalLength; static char *savSendPacket; static int savSendPacketLength; // EP1/EP3 packet size. For polling this can not be greater than 16 static unsigned int maxPacketSize = EP1Len; // Read the command from the endpoint 0 FIFO void HW_USBClocks(PSER_INFO pHWHead); static int getCommand(PSER_INFO pHWHead, void *argP) { unsigned char *bufP = (unsigned char*)argP; int length = pHWHead->pUSBCtrlAddr->OFCR1.out_cnt_low | pHWHead->pUSBCtrlAddr->OFCR2.out_cnt_high<<8; int i; memset(bufP, 0x55, 8); // All setup commands are 8 bytes in length if (length != 8) { DEBUGMSG(1, (TEXT("UDC bad command length %d\n"), length)); return 1; } DEBUGMSG(1, (TEXT("[GETCOMMAND : "))); for (i=0; i < length; i++) { bufP[i] = (BYTE)pHWHead->pUSBCtrlAddr->EP0F.fifo_data; DEBUGMSG(1, (TEXT("%2x "), bufP[i])); } DEBUGMSG(1, (TEXT("]\r\n"))); return 0; } /************************************************************************* Command response with data packets *************************************************************************/ static void sendData(PSER_INFO pHWHead, void *argP, int length, int totalLen) { unsigned char *bufP = (unsigned char*)argP; struct EP0ICSR1Bits EP0ICSR1; int i; // Endpoint0 mode pHWHead->pUSBCtrlAddr->INDEX.index = 0x0; DEBUGMSG(1, (TEXT("[UDC WILL SEND] %d bytes\r\n"), length)); // Send the data back. The FIFO should be turned around for // us already. Just blast aw