libahci_platform.rar_V2

/* * AHCI SATA platform library * * Copyright 2004-2005 Red Hat, Inc. * Jeff Garzik <jgarzik@pobox.com> * Copyright 2010 MontaVista Software, LLC. * Anton Vorontsov <avorontsov@ru.mvista.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2, or (at your option) * any later version. */ #include <linux/clk.h> #include <linux/kernel.h> #include <linux/gfp.h> #include <linux/module.h> #include <linux/pm.h> #include <linux/interrupt.h> #include <linux/device.h> #include <linux/platform_device.h> #include <linux/libata.h> #include <linux/ahci_platform.h> #include <linux/phy/phy.h> #include <linux/pm_runtime.h> #include "ahci.h" static void ahci_host_stop(struct ata_host *host); struct ata_port_operations ahci_platform_ops = { .inherits = &ahci_ops, .host_stop = ahci_host_stop, }; EXPORT_SYMBOL_GPL(ahci_platform_ops); static struct scsi_host_template ahci_platform_sht = { AHCI_SHT("ahci_platform"), }; /** * ahci_platform_enable_phys - Enable PHYs * @hpriv: host private area to store config values * * This function enables all the PHYs found in hpriv->phys, if any. * If a PHY fails to be enabled, it disables all the PHYs already * enabled in reverse order and returns an error. * * RETURNS: * 0 on success otherwise a negative error code */ static int ahci_platform_enable_phys(struct ahci_host_priv *hpriv) { int rc, i; for (i = 0; i < hpriv->nports; i++) { if (!hpriv->phys[i]) continue; rc = phy_init(hpriv->phys[i]); if (rc) goto disable_phys; rc = phy_power_on(hpriv->phys[i]); if (rc) { phy_exit(hpriv->phys[i]); goto disable_phys; } } return 0; disable_phys: while (--i >= 0) { phy_power_off(hpriv->phys[i]); phy_exit(hpriv->phys[i]); } return rc; } /** * ahci_platform_disable_phys - Disable PHYs * @hpriv: host private area to store config values * * This function disables all PHYs found in hpriv->phys. */ static void ahci_platform_disable_phys(struct ahci_host_priv *hpriv) { int i; for (i = 0; i < hpriv->nports; i++) { if (!hpriv->phys[i]) continue; phy_power_off(hpriv->phys[i]); phy_exit(hpriv->phys[i]); } } /** * ahci_platform_enable_clks - Enable platform clocks * @hpriv: host private area to store config values * * This function enables all the clks found in hpriv->clks, starting at * index 0. If any clk fails to enable it disables all the clks already * enabled in reverse order, and then returns an error. * * RETURNS: * 0 on success otherwise a negative error code */ int ahci_platform_enable_clks(struct ahci_host_priv *hpriv) { int c, rc; for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) { rc = clk_prepare_enable(hpriv->clks[c]); if (rc) goto disable_unprepare_clk; } return 0; disable_unprepare_clk: while (--c >= 0) clk_disable_unprepare(hpriv->clks[c]); return rc; } EXPORT_SYMBOL_GPL(ahci_platform_enable_clks); /** * ahci_platform_disable_clks - Disable platform clocks * @hpriv: host private area to store config values * * This function disables all the clks found in hpriv->clks, in reverse * order of ahci_platform_enable_clks (starting at the end of the array). */ void ahci_platform_disable_clks(struct ahci_host_priv *hpriv) { int c; for (c = AHCI_MAX_CLKS - 1; c >= 0; c--) if (hpriv->clks[c]) clk_disable_unprepare(hpriv->clks[c]); } EXPORT_SYMBOL_GPL(ahci_platform_disable_clks); /** * ahci_platform_enable_resources - Enable platform resources * @hpriv: host private area to store config values * * This function enables all ahci_platform managed resources in the * following order: * 1) Regulator * 2) Clocks (through ahci_platform_enable_clks) * 3) Phys * * If resource enabling fails at any point the previous enabled resources * are disabled in reverse order. * * RETURNS: * 0 on success otherwise a negative error code */ int ahci_platform_enable_resources(struct ahci_host_priv *hpriv) { int rc; if (hpriv->target_pwr) { rc = regulator_enable(hpriv->target_pwr); if (rc) return rc; } rc = ahci_platform_enable_clks(hpriv); if (rc) goto disable_regulator; rc = ahci_platform_enable_phys(hpriv); if (rc) goto disable_clks; return 0; disable_clks: ahci_platform_disable_clks(hpriv); disable_regulator: if (hpriv->target_pwr) regulator_disable(hpriv->target_pwr); return rc; } EXPORT_SYMBOL_GPL(ahci_platform_enable_resources); /** * ahci_platform_disable_resources - Disable platform resources * @hpriv: host private area to store config values * * This function disables all ahci_platform managed resources in the * following order: * 1) Phys * 2) Clocks (through ahci_platform_disable_clks) * 3) Regulator */ void ahci_platform_disable_resources(struct ahci_host_priv *hpriv) { ahci_platform_disable_phys(hpriv); ahci_platform_disable_clks(hpriv); if (hpriv->target_pwr) regulator_disable(hpriv->target_pwr); } EXPORT_SYMBOL_GPL(ahci_platform_disable_resources); static void ahci_platform_put_resources(struct device *dev, void *res) { struct ahci_host_priv *hpriv = res; int c; if (hpriv->got_runtime_pm) { pm_runtime_put_sync(dev); pm_runtime_disable(dev); } for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) clk_put(hpriv->clks[c]); } /** * ahci_platform_get_resources - Get platform resources * @pdev: platform device to get resources for * * This function allocates an ahci_host_priv struct, and gets the following * resources, storing a reference to them inside the returned struct: * * 1) mmio registers (IORESOURCE_MEM 0, mandatory) * 2) regulator for controlling the targets power (optional) * 3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node, * or for non devicetree enabled platforms a single clock * 4) phys (optional) * * RETURNS: * The allocated ahci_host_priv on success, otherwise an ERR_PTR value */ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct ahci_host_priv *hpriv; struct clk *clk; struct device_node *child; int i, enabled_ports = 0, rc = -ENOMEM; u32 mask_port_map = 0; if (!devres_open_group(dev, NULL, GFP_KERNEL)) return ERR_PTR(-ENOMEM); hpriv = devres_alloc(ahci_platform_put_resources, sizeof(*hpriv), GFP_KERNEL); if (!hpriv) goto err_out; devres_add(dev, hpriv); hpriv->mmio = devm_ioremap_resource(dev, platform_get_resource(pdev, IORESOURCE_MEM, 0)); if (IS_ERR(hpriv->mmio)) { dev_err(dev, "no mmio space\n"); rc = PTR_ERR(hpriv->mmio); goto err_out; } hpriv->target_pwr = devm_regulator_get_optional(dev, "target"); if (IS_ERR(hpriv->target_pwr)) { rc = PTR_ERR(hpriv->target_pwr); if (rc == -EPROBE_DEFER) goto err_out; hpriv->target_pwr = NULL; } for (i = 0; i < AHCI_MAX_CLKS; i++) { /* * For now we must use clk_get(dev, NULL) for the first clock, * because some platforms (da850, spear13xx) are not yet * converted to use devicetree for clocks. For new platforms * this is equivalent to of_clk_get(dev->of_node, 0). */ if (i == 0) clk = clk_get(dev, NULL); else clk = of_clk_get(dev->of_node, i); if (IS_ERR(clk)) { rc = PTR_ERR(clk); if (rc == -EPROBE_DEFER) goto err_out; break; } hpriv->clks[i] = clk; } hpriv->nports = of_get_child_count(dev->of_node); if (hpriv->nports) { hpriv->phys = devm_kzalloc(dev, hpriv->nports * sizeof(*hpriv->phys), GFP_KERNEL); if (!hpriv->phys) { rc = -ENOMEM; goto err_out; } for_each_child_of_node(dev->of_node, child) { u32 port; if (!of_device_is_available(child)) continue; if (of_property_read_u32(child, "reg", &port)) { rc = -EINVAL; goto err_out; } if (port >= hpriv->nports) { dev_warn(dev, "invalid port number %d\n", port); continue; } mask_port_map |= BIT(port); hpriv->phys[