#include "initial.h"
I2C_Handle hI2C;
static I2C_Config I2CCfg = {
I2C_I2COAR_OF(0x0000007f),
I2C_FMKS(I2CIMR, ICXRDY, MSK) |
I2C_FMKS(I2CIMR, ICRRDY, MSK) |
I2C_FMKS(I2CIMR, ARDY, MSK) |
I2C_FMKS(I2CIMR, NACK, MSK),
//low period for 100KHz operation
I2C_I2CCLKL_OF(0x0000002c),
//high period for 100KHz operation
I2C_I2CCLKH_OF(0x0000002c),
I2C_I2CCNT_OF(0x00000000),
I2C_I2CSAR_OF(0x00000000),
I2C_FMKS(I2CMDR, NACKMOD, ACK) |
I2C_FMKS(I2CMDR, FREE, BSTOP) |
I2C_FMKS(I2CMDR, STT, NONE) |
I2C_FMKS(I2CMDR, STP, NONE) |
I2C_FMKS(I2CMDR, MST, MASTER) |
I2C_FMKS(I2CMDR, TRX, XMT) |
I2C_FMKS(I2CMDR, XA, 7BIT) |
I2C_FMKS(I2CMDR, RM, NONE) |
I2C_FMKS(I2CMDR, DLB, NONE) |
I2C_FMKS(I2CMDR, IRS, RST) |
I2C_FMKS(I2CMDR, STB, NONE) |
I2C_FMKS(I2CMDR, FDF, NONE) |
I2C_FMKS(I2CMDR, BC, BIT8FDF),
// Prescale 150MHz to 10MHz,
// master clk frequency = 10Mhz/((44+6)+(44+6)) = 100KHz,
// where 44 is the value of I2CCLKL and I2CCLKH registers.
I2C_I2CPSC_OF(0x0000000e)
};
void Initial()
{
Uint32 retValue;
// Initialize CSL
CSL_init();
// 设置CACHE模式和大小
CACHE_setL2Mode(CACHE_128KCACHE);
CACHE_enableCaching(CACHE_EMIFA_CE00);
IRQ_setVecs(vectors);
// Unlock PERCFG through PCFGLOCK
*((unsigned long *)0x1b3f018) = 0x10c0010c;
// Enable I2C, VP0 and VP2 in PERCFG
*((unsigned long *)0x1b3f000) = 0x58;
DM642_wait(128);
// Config I2C, setup SA7113 and AD7171
if( (hI2C = I2C_open(I2C_PORT0, I2C_OPEN_RESET)) == INV)
{
return;
}
I2C_config(hI2C, &I2CCfg);
retValue = SA7113_Init();
retValue = ADV7171_Init();
EDMA_clearPram(0);
setupEDMAInterrupt();
retValue = setup_CapBT656_8bit_PAL();
retValue = setup_DispBT656_8bit_PAL();
//ali add
/*
pOutFile = fopen(input.infile, "wb");
if (pInFile == NULL)
{
printf("Error: can not create bitstream file\n");
exit(0);
}//ali end
*/
return;
}
void setupEDMAInterrupt(void)
{
IRQ_globalDisable();
IRQ_nmiEnable();
// Map EDMA interrupt to one of interrupt sources
IRQ_map(IRQ_EVT_EDMAINT, EDMA_INT_SOURCE);
// Enable EDMA interrupts
IRQ_reset(IRQ_EVT_EDMAINT);
IRQ_enable(IRQ_EVT_EDMAINT);
IRQ_globalEnable();
}