SAA7105 参数配置表
If Y-Cb-Cr(4-2-2) is being applied as a 27Mbyte/s data stream, SAA7115 output is directly
as input
Of SAA7104H/SAA7105H
Input:ITU-R.BT656 8bit (720×576/frame, 720×288field),SAA7104H/SAA7105H is mater
mode.
Output:
VGA : R-G-B +分离同步信号(逐行扫描) ;
S-VIDEO,CVBS : PAL---隔行扫描
Y-Cb-Cr 分量输出 PAL---隔行扫描(早期接口 DVD)
Status byte (SA 00 ) : read only
Null (SA 01----SA 15 ) = 00h
Common DAC adjust fine ( SA 16) = 00h
Example: CVBS output(1.23V pp)
R DAC adjust coarse ( SA 17 ) = 1Fh
G DAC adjust coarse ( SA 18 ) =1Fh
B DAC adjust coarse ( SA 19 ) = 1Fh
MSM threshold ( SA 1A) = 46h
Monitor sense mode (SA 1B) = 00h
Chip ID (SA 1C) : only read
Null (SA 1D----SA 25 ) = 00h
Wide screen signal (SA 26) = FFh
Wide screen signal (SA 27) = 3Fh ; Wide screen signal output is disabled
Real-time control, burst start (SA 28) = 21h ;PAL
Sync reset enable, burst end (SA 29) = 1Dh ;PAL
CG enable, copy generation2 (SA 2A) = FFh
CG enable, copy generation2 (SA 2B) = FFh
CG enable, copy generation2 (SA 2C) = 0Fh ;Copy generation data output is disabled
Output pot control ( SA 2D) = 72h
NULL (SA 2E ---SA 36 ) = 00h
Input path control (SA 37) = 00h
Gain luminance for RGB ( SA 38) = 0x00h ; Suggested nominal value = 0
Gain colour difference for RGB ( SA 39) = 0x00h ; Suggested nominal value = 0
Input port control 1 ( SA 3A) = 17h , Y2C = 1 , UV2C = 1
NULL (SA 3B ---SA 53 ) = 00h
VPS enable, input control 2 (SA 54) = 02h
VPS byte 5 (SA 55) = FFh;
VPS byte 11 (SA 56) = FFh;
VPS byte 12 (SA 57) = FFh;
VPS byte 13 (SA 58) = FFh;
VPS byte 14 (SA 59) = FFh;
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