handle_table_pl.rar_Table

#!/usr/bin/perl use Data::Dumper #open (DEBUG_FSBC, "debug_FSBC.table"); open (DEBUG_FSBC, "$ARGV[0]" ) || die "can't open : $ARGV[0]"; $ARGV[0] =~ /debug_(\S+)\.table/; my $module_name = $1 ; if($module_name eq "PCIE"){ $min_i = 1; $add_i = 17; $min_j = 2; $min_m = 1; $div_m = 16; } else { $min_i = 0; $add_i = 34; $min_j = 2; $min_m = 2; $div_m = 32; } $bit_0 = "32'h0000_0001";$bit_1 = "32'h0000_0002";$bit_2 = "32'h0000_0004";$bit_3 = "32'h0000_0008"; $bit_4 = "32'h0000_0010";$bit_5 = "32'h0000_0020";$bit_6 = "32'h0000_0040";$bit_7 = "32'h0000_0080"; $bit_8 = "32'h0000_0100";$bit_9 = "32'h0000_0200";$bit_10 = "32'h0000_0400";$bit_11 = "32'h0000_0800"; $bit_12 = "32'h0000_1000";$bit_13 = "32'h0000_2000";$bit_14 = "32'h0000_4000";$bit_15 = "32'h0000_8000"; $bit_16 = "32'h0001_0000";$bit_17 = "32'h0002_0000";$bit_18 = "32'h0004_0000";$bit_19 = "32'h0008_0000"; $bit_20 = "32'h0010_0000";$bit_21 = "32'h0020_0000";$bit_22 = "32'h0040_0000";$bit_23 = "32'h0080_0000"; $bit_24 = "32'h0100_0000";$bit_25 = "32'h0200_0000";$bit_26 = "32'h0400_0000";$bit_27 = "32'h0800_0000"; $bit_28 = "32'h1000_0000";$bit_29 = "32'h2000_0000";$bit_30 = "32'h4000_0000";$bit_31 = "32'h8000_0000"; $topsel = "4'b0000" if($module_name eq "TOP") ; $topsel = "4'b0001" if($module_name eq "V4IF_DBX") ; $topsel = "4'b0010" if($module_name eq "DRAMC") ; $topsel = "4'b0011" if($module_name eq "PXPTRF") ; $topsel = "4'b0100" if($module_name eq "PCIE") ; $topsel = "4'b0100" if($module_name eq "PCIE_part2") ; $topsel = "4'b1000" if($module_name eq "FSBC") ; $topsel = "4'b1001" if($module_name eq "APIC") ; $topsel = "4'b1010" if($module_name eq "NBPMU") ; $groupsel_l = "force {`PROJECT_PT1.RRDBGMX_MODULE_G1_9,`PROJECT_PT1.RRDBGMX_MODULE_G1_8, `PROJECT_PT1.RRDBGMX_MODULE_G1_7,`PROJECT_PT1.RRDBGMX_MODULE_G1_6, `PROJECT_PT1.RRDBGMX_MODULE_G1_5,`PROJECT_PT1.RRDBGMX_MODULE_G1_4, `PROJECT_PT1.RRDBGMX_MODULE_G1_3,`PROJECT_PT1.RRDBGMX_MODULE_G1_2, `PROJECT_PT1.RRDBGMX_MODULE_G1_1,`PROJECT_PT1.RRDBGMX_MODULE_G1_0}"; $groupsel_h = "force {`PROJECT_PT1.RRDBGMX_MODULE_G1_19,`PROJECT_PT1.RRDBGMX_MODULE_G1_18, `PROJECT_PT1.RRDBGMX_MODULE_G1_17,`PROJECT_PT1.RRDBGMX_MODULE_G1_16, `PROJECT_PT1.RRDBGMX_MODULE_G1_15,`PROJECT_PT1.RRDBGMX_MODULE_G1_14, `PROJECT_PT1.RRDBGMX_MODULE_G1_13,`PROJECT_PT1.RRDBGMX_MODULE_G1_12, `PROJECT_PT1.RRDBGMX_MODULE_G1_11,`PROJECT_PT1.RRDBGMX_MODULE_G1_10}"; $PROJECT = "`PROJECT_PT1"; $PROJECT = "`PROJECT_PT1.V4IF_DBX"if($module_name eq "V4IF_DBX") ; #$PROJECT = "`PROJECT_PT1"if($module_name eq "DRAMC") ; while (<DEBUG_FSBC>) { $matrix[$i] = [split(/\t/,$_)] ; $i++; } for (my $i=$min_i; $i<200 ; $i=$i+$add_i) { for (my $j=$min_j; $j<60 ; $j=$j+3) { if ($matrix[$i]->[$j] eq "") { printf "row $i, column $j is null \n "; } else{ printf "row $i, column $j is $matrix[$i]->[$j] \n "; $temp = $matrix[$i]->[$j]; for (my $m=$i+$min_m; $m<$i+ $add_i ; $m++) { if($module_name eq "PCIE"){ $row_num = 2 if($m<18); $row_num = 3 if($m<35 && $m>18); $row_num = 4 if($m<52 && $m>35); $row_num = 5 if($m<69 && $m>52); $row_num = 6 if($m<86 && $m>69); $row_num = 7 if($m<103 && $m>86); $row_num = 8 if($m<120 && $m>103); $row_num = 9 if($m<137 && $m>120); $row_num = 10 if($m<154 && $m>137); $row_num = 11 if($m<171 && $m>154); $row_num = 12 if($m<188 && $m>171); } else{ $row_num = 2 if($m<35); $row_num = 4 if($m<69 && $m>35); $row_num = 6 if($m<103 && $m>69); $row_num = 8 if($m<137 && $m>103); $row_num = 10 if($m<171 && $m>137); } $index = ($m - $row_num) % $div_m; print "m is $m , index is $index j is $j \n "; $group{$temp}->[$index]->{name} = $matrix[$m]->[$j]; $group{$temp}->[$index]->{hier} = $matrix[$m]->[$j+1]; $group{$temp}->[$index]->{clk} = $matrix[$m]->[$j+2]; } } } } foreach $key (keys (%group)){ print "$key clk :::: $group{$key}->[1]->{clk} \n"; print "$key hier :::: $group{$key}->[1]->{hier} \n"; print "$key name :::: $group{$key}->[1]->{name} \n"; } #####print FSBC vector ############### foreach $key (sort keys (%group)){ if($key =~ /\d+'[h|b](\w+)/){ $group_value = $1; } else{$group_value = $key ; } open (FSBC_VECTOR, ">ty_vector\/$module_name\_$group_value.src"); print FSBC_VECTOR " $groupsel_h = {10'b0000000000};\n"if($module_name ne "PCIE"); print FSBC_VECTOR " $groupsel_l = {5'b00000,5'b$group_value};\n"if($module_name ne "PCIE" && $module_name ne "PCIE_part2"); print FSBC_VECTOR " $groupsel_h = $key ;\n" if($module_name eq "PCIE" or $module_name eq "PCIE_part2"); print FSBC_VECTOR " $groupsel_l = $key ;\n" if($module_name eq "PCIE" or $module_name eq "PCIE_part2"); print FSBC_VECTOR "force {`PROJECT_PT1.RRDBGMX_NBTOP_G1_3,`PROJECT_PT1.RRDBGMX_NBTOP_G1_2, `PROJECT_PT1.RRDBGMX_NBTOP_G1_1,`PROJECT_PT1.RRDBGMX_NBTOP_G1_0} = $topsel; "; # print "$div_m is div_m \n"; for ($cnt=0;$cnt<$div_m;$cnt++){ $name = $group{$key}->[$cnt]->{name}; $hiera = $group{$key}->[$cnt]->{hier}; $bitnum = "x"; $forcevalue_1 = "1'b1"; $forcevalue_0 = "1'b0"; # if($hiera =~ /(\w+)\[(\d+)\]/){ if($module_name eq "PCIE" or $module_name eq "PCIE_part2"){ $hiera =~ /(\S+)\[(\d+)\]/ ; if($2 eq ""){ $hiera = $hiera; $bitnum = $bitnum;} else{ $hiera = $1; $bitnum = $2; print "hero $1 $2 \n"; }} $bittemp = "bit_$bitnum"; $forcevalue_1 = $$bittemp if($bitnum ne "x"); $forcevalue_0 = "32'h0000_0000" if($bitnum ne "x"); print "babe is $forcevalue_1\n" if($bitnum ne "x"); $PROJECT = "`PROJECT_PT1"; $PROJECT = "VT3456" if($hiera =~ /VT3456_PCIEG2_EPHY\S*/); #$PROJECT = "VT3456" if($hiera =~ /PRXCLKC_5X\S*/); $PROJECT = "VT3456" if($hiera =~ /PRXCLKC_6X\S*/); if($name ne "" && $name ne "1'b0"&& $name ne "1'b0 "){ print FSBC_VECTOR " \#15; force $PROJECT.$hiera = $forcevalue_1 ; \#15; force $PROJECT.$hiera = $forcevalue_0 ; \#15; release $PROJECT.$hiera;" } } ####write pcie low 10 bits if($module_name eq "PCIE"){ print FSBC_VECTOR "\n $groupsel_h = $key;"; print FSBC_VECTOR "\n $groupsel_l = $key;"; for ($cnt=0;$cnt< $div_m ;$cnt++){ $name = $group{$key}->[$cnt]->{name}; $hiera = $group{$key}->[$cnt]->{hier}; $bitnum = "x"; $forcevalue_1 = "1'b1"; $forcevalue_0 = "1'b0"; if($hiera =~ /(\S+)\[(\d+)\]/){ $hiera = $1; $bitnum = $2; print "hero $2 \n"; } $bittemp = "bit_$bitnum"; $forcevalue_1 = $$bittemp if($bitnum ne "x"); $forcevalue_0 = "32'h0000_0000" if($bitnum ne "x"); $PROJECT = "`PROJECT_PT1"; $PROJECT = "VT3456" if($hiera =~ /VT3456_PCIEG2_EPHY\S*/); $PROJECT = "VT3456" if($hiera =~ /PRXCLKC_6X\S*/); #$PROJECT = "VT3456" if($hiera =~ /prxclkc_6x\S*/); if($name ne "" && $name ne "1'b0" && $name ne "1'b0 "){ print FSBC_VECTOR " \#15; force $PROJECT.$hiera = $forcevalue_1 ; \#15; force $PROJECT.$hiera = $forcevalue_1 ; \#15; release $PROJECT.$hiera;" } } } } #########print DEBUG_SIGNAL_OUT######### open (DEBUG_OUT_FSBC, ">ty_mon\/debug_signal.out.$module_name"); #print DEBUG_OUT_FSBC "`define delay 1.3 \n"; foreach $key (sort keys (%group)){ if($key =~ /\d+'[h|b](\w+)/){ $groupnum = $1; } else {$groupnum = $key ;} for ($cnt=0;$cnt<$div_m;$cnt++){ $cnt1 = $cnt + 32 ; $name1 = $group{$