// ---------------------------------------------------------------------------
// - Mexecute.cpp -
// - iato:isa library - M execution unit class implementation -
// ---------------------------------------------------------------------------
// - (c) inria 2002-2004 -
// ---------------------------------------------------------------------------
// - authors Amaury Darsch 2002:2004 -
// - Pierre Villalon 2002:2003 -
// - Andre Seznec 2002:2004 -
// ---------------------------------------------------------------------------
// - This program is free software; you can redistribute it and/or modify -
// - it under the terms of the GNU General Public License version 2, as -
// - published by the Free Software Foundation. -
// - -
// - This program is distributed in the hope that it will be useful, -
// - but without any warranty; without even the implied warranty of -
// - merchantability or fitness for a particular purpose. -
// - -
// - See the GNU General Public License version 2 for more details -
// ---------------------------------------------------------------------------
#include "Cfm.hpp"
#include "Psr.hpp"
#include "Bits.hpp"
#include "Utils.hpp"
#include "Mexecute.hpp"
#include "Interrupt.hpp"
namespace iato {
// ------------------------------------------------------------------------
// - M01 instruction group -
// ------------------------------------------------------------------------
// M_LD1
static Result exec_ld1 (const Instr& inst, const Operand& oprd) {
// if nat bit is true, there is a register nat consumption fault
if (oprd.getbval (1) == true)
throw Interrupt (FAULT_IT_RNAT_CONS, inst);
// build result
Result result = inst.getresl ();
// compute nat bit
bool natr = false;
// compute result
t_octa addr = oprd.getoval (1);
// set result
result.setbval (0, natr);
result.setaddr (0, Result::REG_LD1, addr);
return result;
}
// M_LD2
static Result exec_ld2 (const Instr& inst, const Operand& oprd) {
// if nat bit is true, there is a register nat consumption fault
if (oprd.getbval (1) == true)
throw Interrupt (FAULT_IT_RNAT_CONS, inst);
// build result
Result result = inst.getresl ();
// compute nat bit
bool natr = false;
// compute result
t_octa addr = oprd.getoval (1);
// set result
result.setbval (0, natr);
result.setaddr (0, Result::REG_LD2, addr);
return result;
}
// M_LD4
static Result exec_ld4 (const Instr& inst, const Operand& oprd) {
// if nat bit is true, there is a register nat consumption fault
if (oprd.getbval (1) == true)
throw Interrupt (FAULT_IT_RNAT_CONS, inst);
// build result
Result result = inst.getresl ();
// compute nat bit
bool natr = false;
// compute result
t_octa addr = oprd.getoval (1);
// set result
result.setbval (0, natr);
result.setaddr (0, Result::REG_LD4, addr);
return result;
}
// M_LD8
static Result exec_ld8 (const Instr& inst, const Operand& oprd) {
// if nat bit is true, there is a register nat consumption fault
if (oprd.getbval (1) == true)
throw Interrupt (FAULT_IT_RNAT_CONS, inst);
// build result
Result result = inst.getresl ();
// compute nat bit
bool natr = false;
// compute result
t_octa addr = oprd.getoval (1);
// set result
result.setbval (0, natr);
result.setaddr (0, Result::REG_LD8, addr);
return result;
}
// M_LD1_S
static Result exec_ld1_s (const Instr& inst, const Operand& oprd) {
// build result
Result result = inst.getresl ();
t_octa addr = oprd.getoval (1);
// if nat bit is true the target register has its nat bit set
if (oprd.getbval (1) == true) {
result.setbval (0, true);
return result;
}
// set result
result.setbval (0, false);
result.setaddr (0, Result::REG_LD1, addr);
result.setspec (0, true);
return result;
}
// M_LD2_S
static Result exec_ld2_s (const Instr& inst, const Operand& oprd) {
// build result
Result result = inst.getresl ();
t_octa addr = oprd.getoval (1);
// if nat bit is true the target register has its nat bit set
if (oprd.getbval (1) == true) {
result.setbval (0, true);
return result;
}
// set result
result.setbval (0, false);
result.setaddr (0, Result::REG_LD2, addr);
result.setspec (0, true);
return result;
}
// M_LD4_S
static Result exec_ld4_s (const Instr& inst, const Operand& oprd) {
// build result
Result result = inst.getresl ();
t_octa addr = oprd.getoval (1);
// if nat bit is true the target register has its nat bit set
if (oprd.getbval (1) == true) {
result.setbval (0, true);
return result;
}
// set result
result.setbval (0, false);
result.setaddr (0, Result::REG_LD4, addr);
result.setspec (0, true);
return result;
}
// M_LD8_S
static Result exec_ld8_s (const Instr& inst, const Operand& oprd) {
// build result
Result result = inst.getresl ();
t_octa addr = oprd.getoval (1);
// if nat bit is true the target register has its nat bit set
if (oprd.getbval (1) == true) {
result.setbval (0, true);
return result;
}
// set result
result.setbval (0, false);
result.setaddr (0, Result::REG_LD8, addr);
result.setspec (0, true);
return result;
}
// M_LD1_SA
static Result exec_ld1_sa (const Instr& inst, const Operand& oprd) {
// build result
Result result = inst.getresl ();
t_octa addr = oprd.getoval (1);
// if nat bit is true the target register has its nat bit set
if (oprd.getbval (1) == true) {
result.setbval (0, true);
return result;
}
// set result
result.setbval (0, false);
result.setaddr (0, Result::REG_LD1, addr);
result.setaset (0, true);
result.setspec (0, true);
return result;
}
// M_LD2_SA
static Result exec_ld2_sa (const Instr& inst, const Operand& oprd) {
// build result
Result result = inst.getresl ();
t_octa addr = oprd.getoval (1);
// if nat bit is true the target register has its nat bit set
if (oprd.getbval (1) == true) {
result.setbval (0, true);
return result;
}
// set result
result.setbval (0, false);
result.setaddr (0, Result::REG_LD2, addr);
result.setaset (0, true);
result.setspec (0, true);
return result;
}
// M_LD4_SA
static Result exec_ld4_sa (const Instr& inst, const Operand& oprd) {
// build result
Result result = inst.getresl ();
t_octa addr = oprd.getoval (1);
// if nat bit is true the target register has its nat bit set
if (oprd.getbval (1) == true) {
result.setbval (0, true);
return result;
}
// set result
result.setbval (0, false);
result.setaddr (0, Result::REG_LD4, addr);
result.setaset (0, true);
result.setspec (0, true);
return result;
}
// M_LD8_SA
static Result exec_ld8_sa (const Instr& inst, const Operand& oprd) {
// build result
Result result = inst.getresl ();
t_octa addr = oprd.getoval (1);
// if nat bit is true the target register has its nat bit set
if (oprd.getbval (1) == true) {
result.setbval (0, true);
return result;
}
// set result
result.setbval (0, false);
result.setaddr (0, Result::REG_LD8, addr);
result.setaset (0,
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EAJRGO.rar_书籍源码
共122个文件
cpp:55个
hpp:47个
hxx:9个
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EAJRGO.rar_书籍源码 (122个子文件)
Mexecute.cpp 113KB
KAexecute.cpp 98KB
Iexecute.cpp 68KB
Fexecute.cpp 59KB
Mdecode.cpp 52KB
Mrecode.cpp 52KB
Real.cpp 31KB
Record.cpp 30KB
Idecode.cpp 27KB
oAdecode.cpp 23KB
Irecode.cpp 20KB
Fdecode.cpp 19KB
Result.cpp 18KB
Arecode.cpp 18KB
Frecode.cpp 16KB
Register.cpp 15KB
Tracer.cpp 15KB
Memory.cpp 15KB
Bexecute.cpp 15KB
Stat.cpp 14KB
Instr.cpp 14KB
Bundle.cpp 13KB
Bdecode.cpp 12KB
Mrt.cpp 11KB
Rse.cpp 11KB
Psr.cpp 9KB
MemLogic.cpp 9KB
Interrupt.cpp 8KB
Brecode.cpp 8KB
Rid.cpp 8KB
Ctx.cpp 8KB
FAlat.cpp 8KB
Cfm.cpp 7KB
Fpsr.cpp 6KB
Huge.cpp 6KB
Bits.cpp 5KB
Utils.cpp 5KB
Urecode.cpp 5KB
Segment.cpp 4KB
Irt.cpp 4KB
Xdecode.cpp 3KB
Lru.cpp 3KB
Env.cpp 3KB
Pfs.cpp 3KB
Uvr.cpp 3KB
Operand.cpp 3KB
Exception.cpp 3KB
Umr.cpp 3KB
Rpm.cpp 3KB
Filter.cpp 3KB
Resource.cpp 3KB
Xrecode.cpp 3KB
Checker.cpp 3KB
Ip.cpp 3KB
Plugin.cpp 2KB
Opcode.hpp 48KB
Instr.hpp 14KB
Result.hpp 14KB
Record.hpp 11KB
Real.hpp 11KB
Mrt.hpp 8KB
Memory.hpp 8KB
Rse.hpp 8KB
Bundle.hpp 7KB
Stat.hpp 7KB
Isa.hpp 6KB
Rid.hpp 6KB
Register.hpp 6KB
Interrupt.hpp 6KB
Intcode.hpp 6KB
Tracer.hpp 6KB
Operand.hpp 5KB
Ctx.hpp 5KB
Fpsr.hpp 5KB
Psr.hpp 5KB
Irt.hpp 5KB
Cfm.hpp 4KB
Alat.hpp 4KB
Huge.hpp 4KB
Bits.hpp 4KB
Segment.hpp 4KB
Rpm.hpp 3KB
Uvr.hpp 3KB
Utils.hpp 3KB
Resource.hpp 3KB
Exception.hpp 3KB
Filter.hpp 3KB
Env.hpp 3KB
Plugin.hpp 3KB
Pfs.hpp 3KB
Umr.hpp 3KB
Checker.hpp 3KB
MemLogic.hpp 3KB
Ip.hpp 3KB
Lru.hpp 3KB
Executable.hpp 2KB
IAexecute.hpp 2KB
Fexecute.hpp 2KB
Lrn.hpp 2KB
Bexecute.hpp 2KB
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