gpio.rar_IMX6 GPIO_imx6_imx6 gpio驱动_imx6 驱动_linux gpio

/* * Support functions for OMAP GPIO * * Copyright (C) 2003-2005 Nokia Corporation * Written by Juha Yrjölä <juha.yrjola@nokia.com> * * Copyright (C) 2009 Texas Instruments * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include <linux/init.h> #include <linux/module.h> #include <linux/interrupt.h> #include <linux/syscore_ops.h> #include <linux/err.h> #include <linux/clk.h> #include <linux/io.h> #include <linux/slab.h> #include <linux/pm_runtime.h> #include <mach/hardware.h> #include <asm/irq.h> #include <mach/irqs.h> #include <mach/gpio.h> #include <asm/mach/irq.h> struct gpio_bank { unsigned long pbase; void __iomem *base; u16 irq; u16 virtual_irq_start; int method; #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS) u32 suspend_wakeup; u32 saved_wakeup; #endif u32 non_wakeup_gpios; u32 enabled_non_wakeup_gpios; u32 saved_datain; u32 saved_fallingdetect; u32 saved_risingdetect; u32 level_mask; u32 toggle_mask; spinlock_t lock; struct gpio_chip chip; struct clk *dbck; u32 mod_usage; u32 dbck_enable_mask; struct device *dev; bool dbck_flag; int stride; }; #ifdef CONFIG_ARCH_OMAP3 struct omap3_gpio_regs { u32 irqenable1; u32 irqenable2; u32 wake_en; u32 ctrl; u32 oe; u32 leveldetect0; u32 leveldetect1; u32 risingdetect; u32 fallingdetect; u32 dataout; }; static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS]; #endif /* * TODO: Cleanup gpio_bank usage as it is having information * related to all instances of the device */ static struct gpio_bank *gpio_bank; static int bank_width; /* TODO: Analyze removing gpio_bank_count usage from driver code */ int gpio_bank_count; static inline struct gpio_bank *get_gpio_bank(int gpio) { if (cpu_is_omap15xx()) { if (OMAP_GPIO_IS_MPUIO(gpio)) return &gpio_bank[0]; return &gpio_bank[1]; } if (cpu_is_omap16xx()) { if (OMAP_GPIO_IS_MPUIO(gpio)) return &gpio_bank[0]; return &gpio_bank[1 + (gpio >> 4)]; } if (cpu_is_omap7xx()) { if (OMAP_GPIO_IS_MPUIO(gpio)) return &gpio_bank[0]; return &gpio_bank[1 + (gpio >> 5)]; } if (cpu_is_omap24xx()) return &gpio_bank[gpio >> 5]; if (cpu_is_omap34xx() || cpu_is_omap44xx()) return &gpio_bank[gpio >> 5]; BUG(); return NULL; } static inline int get_gpio_index(int gpio) { if (cpu_is_omap7xx()) return gpio & 0x1f; if (cpu_is_omap24xx()) return gpio & 0x1f; if (cpu_is_omap34xx() || cpu_is_omap44xx()) return gpio & 0x1f; return gpio & 0x0f; } static inline int gpio_valid(int gpio) { if (gpio < 0) return -1; if (cpu_class_is_omap1() && OMAP_GPIO_IS_MPUIO(gpio)) { if (gpio >= OMAP_MAX_GPIO_LINES + 16) return -1; return 0; } if (cpu_is_omap15xx() && gpio < 16) return 0; if ((cpu_is_omap16xx()) && gpio < 64) return 0; if (cpu_is_omap7xx() && gpio < 192) return 0; if (cpu_is_omap2420() && gpio < 128) return 0; if (cpu_is_omap2430() && gpio < 160) return 0; if ((cpu_is_omap34xx() || cpu_is_omap44xx()) && gpio < 192) return 0; return -1; } static int check_gpio(int gpio) { if (unlikely(gpio_valid(gpio) < 0)) { printk(KERN_ERR "omap-gpio: invalid GPIO %d\n", gpio); dump_stack(); return -1; } return 0; } static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input) { void __iomem *reg = bank->base; u32 l; switch (bank->method) { #ifdef CONFIG_ARCH_OMAP1 case METHOD_MPUIO: reg += OMAP_MPUIO_IO_CNTL / bank->stride; break; #endif #ifdef CONFIG_ARCH_OMAP15XX case METHOD_GPIO_1510: reg += OMAP1510_GPIO_DIR_CONTROL; break; #endif #ifdef CONFIG_ARCH_OMAP16XX case METHOD_GPIO_1610: reg += OMAP1610_GPIO_DIRECTION; break; #endif #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) case METHOD_GPIO_7XX: reg += OMAP7XX_GPIO_DIR_CONTROL; break; #endif #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) case METHOD_GPIO_24XX: reg += OMAP24XX_GPIO_OE; break; #endif #if defined(CONFIG_ARCH_OMAP4) case METHOD_GPIO_44XX: reg += OMAP4_GPIO_OE; break; #endif default: WARN_ON(1); return; } l = __raw_readl(reg); if (is_input) l |= 1 << gpio; else l &= ~(1 << gpio); __raw_writel(l, reg); } static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) { void __iomem *reg = bank->base; u32 l = 0; switch (bank->method) { #ifdef CONFIG_ARCH_OMAP1 case METHOD_MPUIO: reg += OMAP_MPUIO_OUTPUT / bank->stride; l = __raw_readl(reg); if (enable) l |= 1 << gpio; else l &= ~(1 << gpio); break; #endif #ifdef CONFIG_ARCH_OMAP15XX case METHOD_GPIO_1510: reg += OMAP1510_GPIO_DATA_OUTPUT; l = __raw_readl(reg); if (enable) l |= 1 << gpio; else l &= ~(1 << gpio); break; #endif #ifdef CONFIG_ARCH_OMAP16XX case METHOD_GPIO_1610: if (enable) reg += OMAP1610_GPIO_SET_DATAOUT; else reg += OMAP1610_GPIO_CLEAR_DATAOUT; l = 1 << gpio; break; #endif #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) case METHOD_GPIO_7XX: reg += OMAP7XX_GPIO_DATA_OUTPUT; l = __raw_readl(reg); if (enable) l |= 1 << gpio; else l &= ~(1 << gpio); break; #endif #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) case METHOD_GPIO_24XX: if (enable) reg += OMAP24XX_GPIO_SETDATAOUT; else reg += OMAP24XX_GPIO_CLEARDATAOUT; l = 1 << gpio; break; #endif #ifdef CONFIG_ARCH_OMAP4 case METHOD_GPIO_44XX: if (enable) reg += OMAP4_GPIO_SETDATAOUT; else reg += OMAP4_GPIO_CLEARDATAOUT; l = 1 << gpio; break; #endif default: WARN_ON(1); return; } __raw_writel(l, reg); } static int _get_gpio_datain(struct gpio_bank *bank, int gpio) { void __iomem *reg; if (check_gpio(gpio) < 0) return -EINVAL; reg = bank->base; switch (bank->method) { #ifdef CONFIG_ARCH_OMAP1 case METHOD_MPUIO: reg += OMAP_MPUIO_INPUT_LATCH / bank->stride; break; #endif #ifdef CONFIG_ARCH_OMAP15XX case METHOD_GPIO_1510: reg += OMAP1510_GPIO_DATA_INPUT; break; #endif #ifdef CONFIG_ARCH_OMAP16XX case METHOD_GPIO_1610: reg += OMAP1610_GPIO_DATAIN; break; #endif #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) case METHOD_GPIO_7XX: reg += OMAP7XX_GPIO_DATA_INPUT; break; #endif #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) case METHOD_GPIO_24XX: reg += OMAP24XX_GPIO_DATAIN; break; #endif #ifdef CONFIG_ARCH_OMAP4 case METHOD_GPIO_44XX: reg += OMAP4_GPIO_DATAIN; break; #endif default: return -EINVAL; } return (__raw_readl(reg) & (1 << get_gpio_index(gpio))) != 0; } static int _get_gpio_dataout(struct gpio_bank *bank, int gpio) { void __iomem *reg; if (check_gpio(gpio) < 0) return -EINVAL; reg = bank->base; switch (bank->method) { #ifdef CONFIG_ARCH_OMAP1 case METHOD_MPUIO: reg += OMAP_MPUIO_OUTPUT / bank->stride; break; #endif #ifdef CONFIG_ARCH_OMAP15XX case METHOD_GPIO_1510: reg += OMAP1510_GPIO_DATA_OUTPUT; break; #endif #ifdef CONFIG_ARCH_OMAP16XX case METHOD_GPIO_1610: reg += OMAP1610_GPIO_DATAOUT; break; #endif #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) case METHOD_GPIO_7XX: reg += OMAP7XX_GPIO_DATA_OUTPUT; break; #endif #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) case METHOD_GPIO_24XX: reg += OMAP24XX_GPIO_DATAOUT; break; #endif #ifdef CONFIG_ARCH_OMAP4 case METHOD_GPIO_44XX: reg += OMAP4_GPIO_DATAOUT; break; #endif default: return -EINVAL; } return (__raw_readl(reg) & (1 << get_gpio_index(gpio))) != 0; } #define MOD_REG_BIT(reg, bit_mask, set) \ do { \ int l = __raw_readl(base + reg); \ if (set) l |= bit_mask; \ else l &= ~bit_mask; \ __raw_writel(l, base + reg); \ } while(0) /** * _set_gpio_debounce - low level gpio debounce time * @bank: the gpio bank we're acting upon * @gpio: the gpio number on this @gpio * @debounce: debounce time to use * * OM