BMS code.rar_ATMEGA16HVB_BMS方案代码_BMS的HVB_HVB BMS_HVB芯片

/* This file has been prepared for Doxygen automatic documentation generation.*/ /*! \file ********************************************************************* * * \brief * CC-ADC module. * * \par Application note: * AVR352: Using the CC-ADC * * \par Documentation * For comprehensive code documentation, supported compilers, compiler * settings and supported devices see readme.html * * \author * Atmel Corporation: http://www.atmel.com \n * Support email: avr@atmel.com * * $Revision: 4810 $ * $Date: 2008-11-04 12:22:27 +0100 (ti, 04 nov 2008) $ \n * * Copyright (c) 2008, Atmel Corporation All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * * 3. The name of ATMEL may not be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ******************************************************************************/ #include <ioavr.h> #include "config.h" #include "ccadc.h" /****************************************************************************** Global (file scope) status variables. ******************************************************************************/ //volatile uint8_t ccAdcInputPolarity; volatile int32_t CCADC_accResult; volatile int16_t CCADC_iccResult; union CCADC_conversionFlag_union{ uint8_t allFlags; struct{ uint8_t accResultReady : 1 ; uint8_t iccResultReady : 1 ; uint8_t regularCurrentDetected : 1 ; }; } volatile CCADC_statusFlags = {0x00}; /****************************************************************************** Proto type for private functions. ******************************************************************************/ static void CCADC_PolarityManager( void ); /*! \brief Configuration of the CC-ADC and Regular Current Level. * * Note that the CC-ADC is not started, only configured. The CC-ADC is started * by the CCADC_Mode_Select() function.\n * * \note The Bandgap voltage refence must be enabled and calibrated to used * the CC-ADC. * * \param accConversionTime [ACCT_128, ACCT_256, ACCT_512, ACCT_1024] * \param rccSamplingInterval [RSI_256, RSI_512, RSI_1024, RSI_2048] * \param regularCurrentLevel Given in milliAmps */ void CCADC_Init( CCADC_AccConvPeriod_t accConversionTime, CCADC_RccConvPeriod_t rccSamplingInterval, uint16_t regularCurrentLevel ) { // Set Regular current detection level. CADRC = ((regularCurrentLevel<<RCC_SCALE) / RCC_STEP_SIZE_mA_SCALED); /* Wait until CC-ADC is ready for configuration change. (wait for * synchronization between clock domains to be completed since previous change). */ while( CADCSRA & (1<<CADUB) ){ } /* Write CC-ADC settings: * - Clear CC-ADC Conversion Time and Regular Current Sampling Interval.\n * - select new CC-ADC Conversion Time and Current Sampling Interval.\n * - and set the polarity bit accoring the initial state. */ CADCSRA = (CADCSRA & ~( (1<<CADAS1)|(1<<CADAS0)|(1<<CADSI1)|(1<<CADSI0)|(1<<CADPOL) )) | ((uint8_t)accConversionTime | (uint8_t)rccSamplingInterval) | CCADC_POLARITY_POS; } /*! \brief Selects mode of operation for the CC-ADC * * Select between * - CCADC_DISABLE (To disable the CC-ADC, and disable and clear interrupts). * - CCADC_IAC (CC_ADC is enabled and both Instantaneous and Accumulated Conversions generate interrupts). * - CCADC_IC (CC_ADC is enabled and Instantaneous Conversions generate interrupts). * - CCADC_ACC (CC_ADC is enabled and Instantaneous Conversions generate interrupts). * - CCADC_RCC (Regular Current Condition is enabled - Note that accumulator is cleared)\n * * \note The enabling and disabling does _not_ modify the configuration of CC-ADC. It * only enable and disable the mode and interrupts.\n * * \note The Bandgap voltage refence must be enabled and calibrated to used * the CC-ADC * * \param mode Mode of operation. */ void CCADC_SetMode( CCADC_modes_t mode ) { //!< Wait for synchronization between clock domains before initiating write while( CADCSRA & (1<<CADUB) ){ }; switch( mode ){ case CCADC_DISABLE: // Disable CC-ADC and disable interrupts (and clear pending interrupts). CADCSRA = CADCSRA & ~( (1<<CADEN) | (1<<CADSE) ); CADCSRB = (0<<CADACIE) | (0<<CADRCIE) | (0<<CADICIE) | (1<<CADACIF) | (1<<CADRCIF) | (1<<CADICIF); break; case CCADC_IAC: // Enable CC-ADC with both ICC and ACC interrupts running (and clear pending interrupts). CADCSRA = ( CADCSRA & ~(1<<CADSE) ) | (1<<CADEN); CADCSRB = (1<<CADACIE) | (0<<CADRCIE) | (1<<CADICIE) | (1<<CADACIF) | (1<<CADRCIF) | (1<<CADICIF); break; case CCADC_ICC: // Enable CC-ADC with ICC interrupt running (and clear pending interrupts). CADCSRA = ( CADCSRA & ~(1<<CADSE) ) | (1<<CADEN); CADCSRB = (0<<CADACIE) | (0<<CADRCIE) | (1<<CADICIE) | (1<<CADACIF) | (1<<CADRCIF) | (1<<CADICIF); break; case CCADC_ACC: // Enable CC-ADC with ACC interrupt running (and clear pending interrupts). CADCSRA = ( CADCSRA & ~(1<<CADSE) ) | (1<<CADEN); CADCSRB = (1<<CADACIE) | (0<<CADRCIE) | (0<<CADICIE) | (1<<CADACIF) | (1<<CADRCIF) | (1<<CADICIF); break; case CCADC_RCC: // Enable CC-ADC with RCC and ICC interrupts running (ICC due to RCC unable to wake up device from power save). CADCSRA = CADCSRA | (1<<CADSE) | (1<<CADEN); CADCSRB = (0<<CADACIE) | (1<<CADRCIE) | (1<<CADICIE) | (1<<CADACIF) | (1<<CADRCIF) | (1<<CADICIF); break; default: break; } } /*! \brief Provide information whether CC-ADC is in RCC mode of IC/ACC mode. * * \note The Bandgap voltage refence must be enabled and calibrated to used * the CC-ADC. * * \retval mode [CCADC_RCC, CCADC_IAC (for ICC, ACC or IAC) ] */ uint8_t CCADC_GetMode( void ) { //!< Wait for synchronization between clock domains before reading state while( CADCSRA & (1<<CADUB) ){ } if( CADCSRA & (1<<CADSE) ){ return CCADC_RCC; }else{ return CCADC_IAC; } } /*! \brief Returns result of an CC-ADC Accumulated Conversion. * * Returns the 18 bit signed result of an Accumulated Conversion as signed * 32-bit. The result is scaled so to use a 24.8 signed fixed point format * before it is returned. * * \note The Bandgap voltage refence must be enabled and calibrated to used * the CC-ADC. * * \retval result which is returned in a 24.8 signed fixed point format */ int32_t CCADC_GetAccResult( void ) { int32_t result; uint8_t interruptState = __save_interrupt(); __disable_interrupt(); result = CCADC_acc