// TI File $Revision: /main/2 $
// Checkin $Date: December 1, 2004 16:21:15 $
//###########################################################################
//
// FILE: DSP280x_DefaultIsr.c
//
// TITLE: DSP280x Device Default Interrupt Service Routines.
//
// This file contains shell ISR routines for the 280x PIE vector table.
// Typically these shell ISR routines can be used to populate the entire PIE
// vector table during device debug. In this manner if an interrupt is taken
// during firmware development, there will always be an ISR to catch it.
//
// As develpment progresses, these ISR rotuines can be eliminated and replaced
// with the user's own ISR routines for each interrupt. Since these shell ISRs
// include infinite loops they will typically not be included as-is in the final
// production firmware.
//
//###########################################################################
// $TI Release: DSP280x, DSP2801x Header Files V1.41 $
// $Release Date: August 7th, 2006 $
//###########################################################################
#include "DSP280x_Device.h" // DSP280x Headerfile Include File
#include "DSP280x_Examples.h" // DSP280x Examples Include File
// Connected to INT13 of CPU (use MINT13 mask):
// Note CPU-Timer1 is reserved for TI use, however XINT13
// ISR can be used by the user.
interrupt void INT13_ISR(void) // INT13 or CPU-Timer1
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
// Note CPU-Timer2 is reserved for TI use.
interrupt void INT14_ISR(void) // CPU-Timer2
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void DATALOG_ISR(void) // Datalogging interrupt
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void RTOSINT_ISR(void) // RTOS interrupt
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void EMUINT_ISR(void) // Emulation interrupt
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void NMI_ISR(void) // Non-maskable interrupt
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void ILLEGAL_ISR(void) // Illegal operation TRAP
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm(" ESTOP0");
for(;;);
}
interrupt void USER1_ISR(void) // User Defined trap 1
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER2_ISR(void) // User Defined trap 2
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER3_ISR(void) // User Defined trap 3
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER4_ISR(void) // User Defined trap 4
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER5_ISR(void) // User Defined trap 5
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER6_ISR(void) // User Defined trap 6
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER7_ISR(void) // User Defined trap 7
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER8_ISR(void) // User Defined trap 8
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER9_ISR(void) // User Defined trap 9
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER10_ISR(void) // User Defined trap 10
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER11_ISR(void) // User Defined trap 11
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
interrupt void USER12_ISR(void) // User Defined trap 12
{
// Insert ISR Code here
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
// -----------------------------------------------------------
// PIE Group 1 - MUXed into CPU INT1
// -----------------------------------------------------------
// INT1.1
interrupt void SEQ1INT_ISR(void) //SEQ1 ADC
{
// Insert ISR Code here
// To receive more interrupts from this PIE group, acknowledge this interrupt
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
// INT1.2
interrupt void SEQ2INT_ISR(void) //SEQ2 ADC
{
// Insert ISR Code here
// To receive more interrupts from this PIE group, acknowledge this interrupt
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm(" ESTOP0");
for(;;);
}
// INT1.3 - Reserved
// INT1.4
interrupt void XINT1_ISR(void)
{
// Insert ISR Code here
// To receive more interrupts from this PIE group, acknowledge this interrupt
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
// INT1.5
interrupt void XINT2_ISR(void)
{
// Insert ISR Code here
// To receive more interrupts from this PIE group, acknowledge this interrupt
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
// INT1.6
interrupt void ADCINT_ISR(void) // ADC
{
// Insert ISR Code here
// To receive more interrupts from this PIE group, acknowledge this interrupt
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}
// INT1.7
interrupt void TINT0_ISR(void) // CPU-Timer 0
{
// Insert ISR Code here
// T
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spi1.zip_tms320f2808 spi
共33个文件
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pp:5个
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基于TMS320F2808,实现SPI的查询方式,开发环境ccs4.2,程序已验证过,对SPI的配置注释详细,容易理解,对2000系列入门者有一定启发
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收起资源包目录
spi1.zip (33个子文件)
spi1
DSP280x_PieCtrl.c 3KB
DSP280x_DefaultIsr.c 25KB
.cdtbuild 9KB
.settings
org.eclipse.cdt.managedbuilder.core.prefs 551B
DSP280x_Headers_nonBIOS.cmd 8KB
spi1.c 2KB
.project 584B
.cdtproject 677B
DSP280x_GlobalVariableDefs.c 10KB
.ccsproject 340B
DSP280x_CodeStartBranch.asm 3KB
DSP280x_PieVect.c 7KB
2808_RAM_lnk.cmd 5KB
Debug
spi1.out 120KB
DSP280x_PieCtrl.pp 3KB
sources.mk 2KB
ccsSrcs.opt 151B
DSP280x_CodeStartBranch.obj 2KB
DSP280x_DefaultIsr.pp 3KB
subdir.mk 5KB
DSP280x_PieVect.pp 3KB
DSP280x_GlobalVariableDefs.pp 3KB
DSP280x_PieVect.obj 99KB
objects.mk 275B
DSP280x_GlobalVariableDefs.obj 101KB
ccsObjs.opt 249B
spi1.map 21KB
makefile 3KB
DSP280x_DefaultIsr.obj 125KB
spi1.pp 3KB
spi1.obj 98KB
DSP280x_PieCtrl.obj 92KB
rts2800_ml.lib 1.16MB
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