ADS1148.zip_ADS1148_Driver

/* +----------------------------------------------------------------------+ | Texas Instruments ADS1148 Driver (ADS1148.h) | +----------------------------------------------------------------------+ | | | Author: Juan Cols - Politecnico di Milano | | | | Copyright: Attribution-NonCommercial- | | ShareAlike (CC) BY-NC-SA 2015 POLIMI | | | | MCU: PIC16F84A | | Clock: 4 MHZ | | Created on: 09/10/2016 11:52 AM | | Last Revision: 08/11/2016 | | | +----------------------------------------------------------------------+ */ /* +----------------------------------------------------------------------+ | Definitions (Macros) | +----------------------------------------------------------------------| */ #include <pic16f84a.h> // Define here the microprocessor to be used #define _XTAL_FREQ 4000000 //ADS1148 Pins Definition #define START PORTAbits.RA0 // Start pin of the ADS1148 #define RESET PORTBbits.RB3 // Reset pin of the ADS1148 #define DRDY PORTBbits.RB4 // Data Ready pin of the ADS1148 (active low) #define SCLK PORTBbits.RB7 // Serial clock of SPI interface #define DIN PORTBbits.RB6 // MOSI: Master Output Slave Input (ADS1148 data input) #define DOUT PORTBbits.RB5 // MISO: Master Input Slave Output (ADS1148 data output) #define CS PORTAbits.RA1 // Chip selection (active low) //TRIS of Pins #define START_TRIS TRISAbits.TRISA0 #define RESET_TRIS TRISBbits.TRISB3 #define DRDY_TRIS TRISBbits.TRISB4 #define SCLK_TRIS TRISBbits.TRISB7 #define DIN_TRIS TRISBbits.TRISB6 #define DOUT_TRIS TRISBbits.TRISB5 #define CS_TRIS TRISAbits.TRISA1 //Time Constants #define t_cssc 1 // t_cssc: Delay time, first SCLK rising edge after CS falling edge (min. = 10 ns) #define t_2sclk 1 // t_2sclk: twice the period of SCLK (2 us). (min. = 488 ns) //Commands #define RESET_CMD 0x06 // Reset Command: Resets the Device #define SDATC 0x16 // SDATC: Stop Data Continuos mode #define SYNC 0x04 // Synchronization Command: Resets the ADC digital filter and starts a new conversion #define RDATA 0x12 // RDATA (0001 001x): loads the most recent conversion result into the output register (I considered x=0) //Configuration Registers Addresses #define MUX0_CONT 0x00 // MUX Control Register 0 (address 00h) #define MUX1_CONT 0x02 // MUX Control Register 1 (address 02h) #define VBIAS 0x01 // Bias Voltage Register (address 01h) #define SYS_CONT 0x03 // System Control Register (address 03h) // Multiplexer Control Register 0 (00h) #define BCS_OFF 0b00000000 // Burn-out Detect Current Source Off #define BCS_05 0b00000001 // Burn-out current source on, 0.5 ?A #define BCS_2 0b00000010 // Burn-out current source on, 2.0 ?A #define BCS_10 0b00000011 // Burn-out current source on, 10.0 ?A #define MUXP_AIN0 0b00000000 // Selects Ain 0 as Positive input channel #define MUXP_AIN1 0b00001000 // Selects Ain 1 as Positive input channel #define MUXP_AIN2 0b00010000 // Selects Ain 2 as Positive input channel #define MUXP_AIN3 0b00011000 // Selects Ain 3 as Positive input channel #define MUXP_AIN4 0b00100000 // Selects Ain 4 as Positive input channel #define MUXP_AIN5 0b00101000 // Selects Ain 5 as Positive input channel #define MUXP_AIN6 0b00110000 // Selects Ain 6 as Positive input channel #define MUXN_AIN7 0b00111000 // Selects Ain 7 as Positive input channel #define MUXN_AIN0 0b00000000 // Selects Ain 0 as Negative input channel #define MUXN_AIN1 0b00000001 // Selects Ain 1 as Negative input channel #define MUXN_AIN2 0b00000010 // Selects Ain 2 as Negative input channel #define MUXN_AIN3 0b00000011 // Selects Ain 3 as Negative input channel #define MUXN_AIN4 0b00000100 // Selects Ain 4 as Negative input channel #define MUXN_AIN5 0b00000101 // Selects Ain 5 as Negative input channel #define MUXN_AIN6 0b00000110 // Selects Ain 6 as Negative input channel #define MUXN_AIN7 0b00000111 // Selects Ain 7 as Negative input channel // Multiplexer Control Register 1 (02h) #define INT_VREF_ON 0b00100000 // Internal reference voltage is always OFF #define INT_VREF_OFF 0b00000000 // Internal reference voltage is always ON #define VREF_IN_PN0 0b00000000 // Reference Voltage Input: REFP0 and REFN0 reference inputs selected (default) #define VREF_IN_PN1 0b00001000 // Reference Voltage Input: REFP1 and REFN1 reference inputs selected #define VREF_IN_INT 0b00010000 // Reference Voltage Input: Internal Reference selected #define MUXCAL_NORMAL 0b00000000 // Normal operation (default) #define MUXCAL_OFFSET 0b00000001 // Offset calibration. The analog inputs are disconnected and AINP and AINN are internally connected to mid-supply (AVDD + AVSS)/2 #define MUXCAL_GAIN 0b00000010 // Gain calibration. The analog inputs are connected to the voltage reference #define MUXCAL_TEMP 0b00000011 // Temperature measurement. The inputs are connected to a diode circuit that produces a voltage proportional to the ambient temperature #define MUXCAL_