/*
* Conexant cx24123/cx24109 - DVB QPSK Satellite demod/tuner driver
*
* Copyright (C) 2005 Steven Toth <[email protected]>
*
* Support for KWorld DVB-S 100 by Vadim Catana <[email protected]>
*
* Support for CX24123/CX24113-NIM by Patrick Boettcher <[email protected]>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/slab.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <asm/div64.h>
#include "dvb_frontend.h"
#include "cx24123.h"
#define XTAL 10111000
static int force_band;
module_param(force_band, int, 0644);
MODULE_PARM_DESC(force_band, "Force a specific band select "\
"(1-9, default:off).");
static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
#define info(args...) do { printk(KERN_INFO "CX24123: " args); } while (0)
#define err(args...) do { printk(KERN_ERR "CX24123: " args); } while (0)
#define dprintk(args...) \
do { \
if (debug) { \
printk(KERN_DEBUG "CX24123: %s: ", __func__); \
printk(args); \
} \
} while (0)
struct cx24123_state {
struct i2c_adapter *i2c;
const struct cx24123_config *config;
struct dvb_frontend frontend;
/* Some PLL specifics for tuning */
u32 VCAarg;
u32 VGAarg;
u32 bandselectarg;
u32 pllarg;
u32 FILTune;
struct i2c_adapter tuner_i2c_adapter;
u8 demod_rev;
/* The Demod/Tuner can't easily provide these, we cache them */
u32 currentfreq;
u32 currentsymbolrate;
};
/* Various tuner defaults need to be established for a given symbol rate Sps */
static struct cx24123_AGC_val {
u32 symbolrate_low;
u32 symbolrate_high;
u32 VCAprogdata;
u32 VGAprogdata;
u32 FILTune;
} cx24123_AGC_vals[] =
{
{
.symbolrate_low = 1000000,
.symbolrate_high = 4999999,
/* the specs recommend other values for VGA offsets,
but tests show they are wrong */
.VGAprogdata = (1 << 19) | (0x180 << 9) | 0x1e0,
.VCAprogdata = (2 << 19) | (0x07 << 9) | 0x07,
.FILTune = 0x27f /* 0.41 V */
},
{
.symbolrate_low = 5000000,
.symbolrate_high = 14999999,
.VGAprogdata = (1 << 19) | (0x180 << 9) | 0x1e0,
.VCAprogdata = (2 << 19) | (0x07 << 9) | 0x1f,
.FILTune = 0x317 /* 0.90 V */
},
{
.symbolrate_low = 15000000,
.symbolrate_high = 45000000,
.VGAprogdata = (1 << 19) | (0x100 << 9) | 0x180,
.VCAprogdata = (2 << 19) | (0x07 << 9) | 0x3f,
.FILTune = 0x145 /* 2.70 V */
},
};
/*
* Various tuner defaults need to be established for a given frequency kHz.
* fixme: The bounds on the bands do not match the doc in real life.
* fixme: Some of them have been moved, other might need adjustment.
*/
static struct cx24123_bandselect_val {
u32 freq_low;
u32 freq_high;
u32 VCOdivider;
u32 progdata;
} cx24123_bandselect_vals[] =
{
/* band 1 */
{
.freq_low = 950000,
.freq_high = 1074999,
.VCOdivider = 4,
.progdata = (0 << 19) | (0 << 9) | 0x40,
},
/* band 2 */
{
.freq_low = 1075000,
.freq_high = 1177999,
.VCOdivider = 4,
.progdata = (0 << 19) | (0 << 9) | 0x80,
},
/* band 3 */
{
.freq_low = 1178000,
.freq_high = 1295999,
.VCOdivider = 2,
.progdata = (0 << 19) | (1 << 9) | 0x01,
},
/* band 4 */
{
.freq_low = 1296000,
.freq_high = 1431999,
.VCOdivider = 2,
.progdata = (0 << 19) | (1 << 9) | 0x02,
},
/* band 5 */
{
.freq_low = 1432000,
.freq_high = 1575999,
.VCOdivider = 2,
.progdata = (0 << 19) | (1 << 9) | 0x04,
},
/* band 6 */
{
.freq_low = 1576000,
.freq_high = 1717999,
.VCOdivider = 2,
.progdata = (0 << 19) | (1 << 9) | 0x08,
},
/* band 7 */
{
.freq_low = 1718000,
.freq_high = 1855999,
.VCOdivider = 2,
.progdata = (0 << 19) | (1 << 9) | 0x10,
},
/* band 8 */
{
.freq_low = 1856000,
.freq_high = 2035999,
.VCOdivider = 2,
.progdata = (0 << 19) | (1 << 9) | 0x20,
},
/* band 9 */
{
.freq_low = 2036000,
.freq_high = 2150000,
.VCOdivider = 2,
.progdata = (0 << 19) | (1 << 9) | 0x40,
},
};
static struct {
u8 reg;
u8 data;
} cx24123_regdata[] =
{
{0x00, 0x03}, /* Reset system */
{0x00, 0x00}, /* Clear reset */
{0x03, 0x07}, /* QPSK, DVB, Auto Acquisition (default) */
{0x04, 0x10}, /* MPEG */
{0x05, 0x04}, /* MPEG */
{0x06, 0x31}, /* MPEG (default) */
{0x0b, 0x00}, /* Freq search start point (default) */
{0x0c, 0x00}, /* Demodulator sample gain (default) */
{0x0d, 0x7f}, /* Force driver to shift until the maximum (+-10 MHz) */
{0x0e, 0x03}, /* Default non-inverted, FEC 3/4 (default) */
{0x0f, 0xfe}, /* FEC search mask (all supported codes) */
{0x10, 0x01}, /* Default search inversion, no repeat (default) */
{0x16, 0x00}, /* Enable reading of frequency */
{0x17, 0x01}, /* Enable EsNO Ready Counter */
{0x1c, 0x80}, /* Enable error counter */
{0x20, 0x00}, /* Tuner burst clock rate = 500KHz */
{0x21, 0x15}, /* Tuner burst mode, word length = 0x15 */
{0x28, 0x00}, /* Enable FILTERV with positive pol., DiSEqC 2.x off */
{0x29, 0x00}, /* DiSEqC LNB_DC off */
{0x2a, 0xb0}, /* DiSEqC Parameters (default) */
{0x2b, 0x73}, /* DiSEqC Tone Frequency (default) */
{0x2c, 0x00}, /* DiSEqC Message (0x2c - 0x31) */
{0x2d, 0x00},
{0x2e, 0x00},
{0x2f, 0x00},
{0x30, 0x00},
{0x31, 0x00},
{0x32, 0x8c}, /* DiSEqC Parameters (default) */
{0x33, 0x00}, /* Interrupts off (0x33 - 0x34) */
{0x34, 0x00},
{0x35, 0x03}, /* DiSEqC Tone Amplitude (default) */
{0x36, 0x02}, /* DiSEqC Parameters (default) */
{0x37, 0x3a}, /* DiSEqC Parameters (default) */
{0x3a, 0x00}, /* Enable AGC accumulator (for signal strength) */
{0x44, 0x00}, /* Constellation (default) */
{0x45, 0x00}, /* Symbol count (default) */
{0x46, 0x0d}, /* Symbol rate estimator on (default) */
{0x56, 0xc1}, /* Error Counter = Viterbi BER */
{0x57, 0xff}, /* Error Counter Window (default) */
{0x5c, 0x20}, /* Acquisition AFC Expiration window (default is 0x10) */
{0x67, 0x83}, /* Non-DCII symbol clock */
};
static int cx24123_i2c_writereg(struct cx24123_state *state,
u8 i2c_addr, int reg, int data)
{
u8 buf[] = { reg, data };
struct i2c_msg msg = {
.addr = i2c_addr, .flags = 0, .buf = buf, .len = 2
};
int err;
/* printk(KERN_DEBUG "wr(%02x): %02x %02x\n", i2c_addr, reg, data); */
err = i2c_transfer(state->i2c, &msg, 1);
if (err != 1) {
printk("%s: writereg error(err == %i, reg == 0x%02x,"
" data == 0x%02x)\n", __func__, err, reg, data);
return err;
}
return 0;
}
static int cx24123_i2c_readreg(struct cx24123_state *state, u8 i2c_addr, u8 reg)
{
int ret;
u8 b = 0;
struct i2c_msg msg[] = {
{ .addr = i2c_addr, .flags = 0, .buf = ®, .len = 1 },
{ .addr = i2c_addr, .flags = I2C_M_RD, .buf = &b, .len = 1 }
};
ret = i2c_transfer(state->i2c, msg, 2);
if (ret != 2) {
err("%s: reg=0x%x (error=%d)\n", __func__, reg, ret);
return ret;
}
/* printk(KERN_DEBUG "rd(%02x): %02x %02x\n", i2c_addr, reg, b); */
return b;
}
#define cx24123_readreg(state, reg) \
cx24123_i2c_readreg(state, state->config->demod_address, reg)
#define cx24123_writereg(state, reg, val) \
cx24123_i2c_writereg(state, state->config->demod_address, reg, val)
static int cx24123_set_inversion(struct cx24123_state *state,
fe_spectral_inversion_t inversion)
{
u8 nom_reg = cx24123_readreg(state, 0x0e);
u8 auto_reg = cx24123_readreg(state, 0x10);
switch (inversion) {
case INVERSION_OFF:
dprintk("inversion off\n")
