dcm.rar_DCM VERILOG_dcm_dcm vh_spectrum spread_配套光盘

README file: Virtex-II Platform FPGA Handbook ============================================= Date: March, 2001 Verilog code examples are provided to illustrate the Chapter 2 - Design Considerations - of the Virtex-II Platform FPFA Handbook. - Verilog Templates: Verilog templates are available as examples to instantiate primitives. - Verilog Submodules: Verilog submodules are low level Verilog code instantiating some primitives. These submodules can be instantiated in a design and must be synthesized with the design. The templates and submodules can be found in the following directories corresponding to each section of the Chapter 2: Design Considerations (Virtex-II Platform FPGA HandBook) Directory: ------------ - dcm: "Using the Digital Clock Manager" Templates (primitive): DCM_INST Submodules (code example): - Clock de-skew BUFG_CLK0_SUBM BUFG_CLK2X_SUBM BUFG_CLK0_FB_SUBM BUFG_CLK2X_FB_SUBM BUFG_CLKDV_SUBM - Frequency synthesizer BUFG_DFS_SUBM BUFG_DFS_FB_SUBM - Phase shifter BUFG_PHASE_CLKFX_FB_SUBM BUFG_PHASE_CLK0_SUBM BUFG_PHASE_CLK2X_SUBM BUFG_PHASE_CLKDV_SUBM Who to Contact if you have questions? http://support.xilinx.com/ North American Support Hotline: 1-800-255-7778 or (408) 879-5199 Fax: (408) 879-4442 Email: hotline@xilinx.com United Kingdom Support Hotline: +44 870 7350 610 Fax: +44 870 7350 620 Email : ukhelp@xilinx.com Japan Support Hotline: Local Distributor Fax: Local Distributor Email: jhotline@xilinx.com