IR.rar_LM3S1635_Luminary

//***************************************************************************** // // sysctl.c - Driver for the system controller. // // Copyright (c) 2005-2007 Luminary Micro, Inc. All rights reserved. // // Software License Agreement // // Luminary Micro, Inc. (LMI) is supplying this software for use solely and // exclusively on LMI's microcontroller products. // // The software is owned by LMI and/or its suppliers, and is protected under // applicable copyright laws. All rights are reserved. You may not combine // this software with "viral" open-source software in order to form a larger // program. Any use in violation of the foregoing restrictions may subject // the user to criminal sanctions under applicable laws, as well as to civil // liability for the breach of the terms and conditions of this license. // // THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED // OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF // MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. // LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR // CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. // // This is part of revision 1928 of the Stellaris Peripheral Driver Library. // //***************************************************************************** //***************************************************************************** // //! \addtogroup sysctl_api //! @{ // //***************************************************************************** #include "../hw_ints.h" #include "../hw_memmap.h" #include "../hw_nvic.h" #include "../hw_sysctl.h" #include "../hw_types.h" #include "cpu.h" #include "debug.h" #include "interrupt.h" #include "sysctl.h" //***************************************************************************** // // This macro extracts the array index out of the peripheral number. // //***************************************************************************** #define SYSCTL_PERIPH_INDEX(a) (((a) >> 28) & 0xf) //***************************************************************************** // // This macro constructs the peripheral bit mask from the peripheral number. // //***************************************************************************** #define SYSCTL_PERIPH_MASK(a) (((a) & 0xffff) << (((a) & 0x001f0000) >> 16)) //***************************************************************************** // // An array that maps the "peripheral set" number (which is stored in the upper // nibble of the SYSCTL_PERIPH_* defines) to the SYSCTL DC? register that // contains the peripheral present bit for that peripheral. // //***************************************************************************** static const unsigned long g_pulDCRegs[] = { SYSCTL_DC1, SYSCTL_DC2, SYSCTL_DC4, SYSCTL_DC1 }; //***************************************************************************** // // An array that maps the "peripheral set" number (which is stored in the upper // nibble of the SYSCTL_PERIPH_* defines) to the SYSCTL_SRCR? register that // controls the software reset for that peripheral. // //***************************************************************************** static const unsigned long g_pulSRCRRegs[] = { SYSCTL_SRCR0, SYSCTL_SRCR1, SYSCTL_SRCR2 }; //***************************************************************************** // // An array that maps the "peripheral set" number (which is stored in the upper // nibble of the SYSCTL_PERIPH_* defines) to the SYSCTL_RCGC? register that // controls the run-mode enable for that peripheral. // //***************************************************************************** static const unsigned long g_pulRCGCRegs[] = { SYSCTL_RCGC0, SYSCTL_RCGC1, SYSCTL_RCGC2 }; //***************************************************************************** // // An array that maps the "peripheral set" number (which is stored in the upper // nibble of the SYSCTL_PERIPH_* defines) to the SYSCTL_SCGC? register that // controls the sleep-mode enable for that peripheral. // //***************************************************************************** static const unsigned long g_pulSCGCRegs[] = { SYSCTL_SCGC0, SYSCTL_SCGC1, SYSCTL_SCGC2 }; //***************************************************************************** // // An array that maps the "peripheral set" number (which is stored in the upper // nibble of the SYSCTL_PERIPH_* defines) to the SYSCTL_DCGC? register that // controls the deep-sleep-mode enable for that peripheral. // //***************************************************************************** static const unsigned long g_pulDCGCRegs[] = { SYSCTL_DCGC0, SYSCTL_DCGC1, SYSCTL_DCGC2 }; //***************************************************************************** // // An array that maps the crystal number in RCC to a frequency. // //***************************************************************************** static const unsigned long g_pulXtals[] = { 1000000, 1843200, 2000000, 2457600, 3579545, 3686400, 4000000, 4096000, 4915200, 5000000, 5120000, 6000000, 6144000, 7372800, 8000000, 8192000 }; //***************************************************************************** // //! Gets the size of the SRAM. //! //! This function determines the size of the SRAM on the Stellaris device. //! //! \return The total number of bytes of SRAM. // //***************************************************************************** unsigned long SysCtlSRAMSizeGet(void) { // // Compute the size of the SRAM. // return(((HWREG(SYSCTL_DC0) & SYSCTL_DC0_SRAMSZ_M) >> 8) + 0x100); } //***************************************************************************** // //! Gets the size of the flash. //! //! This function determines the size of the flash on the Stellaris device. //! //! \return The total number of bytes of flash. // //***************************************************************************** unsigned long SysCtlFlashSizeGet(void) { // // Compute the size of the flash. // return(((HWREG(SYSCTL_DC0) & SYSCTL_DC0_FLASHSZ_M) << 11) + 0x800); } //***************************************************************************** // //! Determines if a pin is present. //! //! \param ulPin is the pin in question. //! //! Determines if a particular pin is present in the device. The PWM, analog //! comparators, ADC, and timers have a varying number of pins across members //! of the Stellaris family; this will determine which are present on this //! device. //! //! The \e ulPin argument must be only one of the following values: //! \b SYSCTL_PIN_PWM0, \b SYSCTL_PIN_PWM1, \b SYSCTL_PIN_PWM2, //! \b SYSCTL_PIN_PWM3, \b SYSCTL_PIN_PWM4, \b SYSCTL_PIN_PWM5, //! \b SYSCTL_PIN_C0MINUS, \b SYSCTL_PIN_C0PLUS, \b SYSCTL_PIN_C0O, //! \b SYSCTL_PIN_C1MINUS, \b SYSCTL_PIN_C1PLUS, \b SYSCTL_PIN_C1O, //! \b SYSCTL_PIN_C2MINUS, \b SYSCTL_PIN_C2PLUS, \b SYSCTL_PIN_C2O, //! \b SYSCTL_PIN_ADC0, \b SYSCTL_PIN_ADC1, \b SYSCTL_PIN_ADC2, //! \b SYSCTL_PIN_ADC3, \b SYSCTL_PIN_ADC4, \b SYSCTL_PIN_ADC5, //! \b SYSCTL_PIN_ADC6, \b SYSCTL_PIN_ADC7, \b SYSCTL_PIN_CCP0, //! \b SYSCTL_PIN_CCP1, \b SYSCTL_PIN_CCP2, \b SYSCTL_PIN_CCP3, //! \b SYSCTL_PIN_CCP4, \b SYSCTL_PIN_CCP5, \b SYSCTL_PIN_CCP6, //! \b SYSCTL_PIN_CCP7, \b SYSCTL_PIN_32KHZ, or \b SYSCTL_PIN_MC_FAULT0. //! //! \return Returns \b true if the specified pin is present and \b false if it //! is not. // //***************************************************************************** tBoolean SysCtlPinPresent(unsigned long ulPin) { // // Check the arguments. // ASSERT((ulPin == SYSCTL_PIN_PW